GX-608EF2
8
Pin
Function
I/O
Description
Processing Operation
48
STOUT
O
Monitor signal serial data output
(OFT, VDET, BDO, RFDET, etc.)
49
STLD
O
Monitor signal load signal output
50
SMCK
O
Monitor signal bit lock signal output
51
CSEL
I
Crystal oscillator frequency setting terminal
L: locked
H: 33.8688 MHz L: 16.9344 MHz
52
TEST1
I
Test terminal 1
L: locked (normal)
53
TEST2
I
Test terminal 2
L: locked (normal)
54
IOSEL
I
Audio DAC external data input mode setting
terminal
55
/NRST
I
Reset input
L: reset
56
BCLK
O
SRDATA bit clock output
57
LRCK
O
L/R identification signal output
58
SRDATA
O
Serial data output
59
SUBC
O
Subcode serial output
60
SBCK
I
Subcode serial output clock input
61
DQSY
O
CD-TEXT read enable signal output
62
DEMPH
O
Deemphasis detection signal input
L: ON
63
TX
O
Digital audio interface signal output
64
SRDATAIN
I
SRDATA input/test terminal
65
LRCKIN
I
LRCK input/SMCK output frequency switching
66
BCLKIN
I
BCLK input When not used: VDD
67
DVDD1
I
Digital circuit power supply
68
X1
I
Crystal oscillator circuit input terminal
69
X2
O
Crystal oscillator circuit output terminal
70
DVSS1
I
Digital circuit GND
71
XSUB1
I
Microprocessor clock input terminal
72
XSUB2
O
Microprocessor clock output terminal
73
DVDD2
I
Digital circuit power supply
74-78 NC
O
No connection
79
CLVS
O
Spindle servo phase synchronization signal output H = CLV L = rough servo
80
TEST
I
Test mode switching terminal
81
ASEL
I
Audio output polarity detection terminal
82
PON
O
Audio and digital power supply control terminal
83
SEARCH
O
Servo IC gain switching control terminal
84
VER/HOR
O
Vertical/horizontal installation switching monitor
terminal
85
SW3
I
Limit switch detection terminal
86
/MUTE_L
O
Lch analog mute control terminal
87
/MUTE_R
O
Rch analog mute control terminal
88
CD_R
O
CD-R control terminal
89
/RST
I
System reset input terminal
90
NC
I
No connection
91
/MSTOP
I
Standby detection terminal
92
NC
O
No connection
93
DATA
I/O
12C bus data line
(communications line with system microprocessor)
94
/CLK
I/O
12C bus clock line
(communications line with system microprocessor)
95
HOT
I
Temperature protection detection terminal
96
VREF+
I
A/D converter power supply
97
OUTR
O
Rch audio output
98
AVDD1
I
Analog circuit power supply
(for audio output section (both Lch and Rch))
99
OUTL
O
Lch audio output
100
AVSS1
I
Analog circuit GND
MICROCOMPUTER'S TERMINAL DESCRIPTION
