33
PFP7/REV C/01-08
8.5
Signal processing description
Refer to
Figures 8.5.1
and
8.5.2
.
The signal from the PIN (PD1) diode is amplified by IC1, a high input impedance op-amp. The
coarse gain control switches 1, 10 and 100 Megohm resistors into the feedback to change the
gain on the first three ranges. On range 4 the 100 Megohm resistor is left in circuit and the
sensitivity of the 7107(IC5) is increased by a factor of approximately 10. The 10 Kilohm
potentiometer feeding into the inverting input of IC1 is a factory preset control for compensating
for any dark current from the PIN diode and for any offset in IC1. The output of IC1 is then fed
through a filter network consisting of R8, C4 and R9, C5; the signal is then fed into IC2 a non-
inverting buffer with RV2 its preset offset adjustment.
The front panel
blank
potentiometer, RV3, provides an adjustable DC offset which is fed into
the inverting input of IC3 to compensate for any signal from the flame background when setting
the readout to zero with the flame alight.
The front panel
fine
sensitivity potentiometer, RV4, controls the gain of IC3 and the values in
the feedback of this stage are selected to enable the sensitivity to be varied continuously
between each of the switched steps of the coarse sensitivity control.
The output of IC3 is fed via a filter consisting of R15 and C7 to the 7107 (IC5). The 7107 is an
Analogue to Digital converter complete with a 7 segment decoder/driver for the 3½ digit LED
display. The sensitivity of the A to D converter is set by RV6 to approximately 1mV per digit on
coarse sensitivity ranges 1, 2 and 3 and 0.1mV per digit on coarse sensitivity range 4 by SW1B
and RV7. The output of IC3 is also fed to the non inverting buffer IC4 (with preset offset control
RV5) to give a buffered recorder output of 1mV per digit on ranges 1, 2 and 3 and 0.1mV per
digit on range 4. The preferred decimal point may be selected by SW2 which connects the
relevant decimal point to 0V through a 560 ohm resistor, R16, R17 or R18.
Figure 8.5.1
: Main circuit board layout.