JVC MX-J570V, Service Manual

Page: 50 / 112

MX-J570V/MX-J680V
1-50
3. Pin function
Pin
No.
symbol I/O
O
O
O
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Pin
No.
symbol
I/O
42
41
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
II
I
I
I
O
BCLK
LRCK
SRDATA
DVDD1
DVSS1
TX
MCLK
MDATA
MLD
I
I
I
SENSE
FLOCK
TLOCK
BLKCK
SQCK
-
O
O
-
-
-
I
I
I
I
I
SUBQ
DMUTE
STATUS
I
O
O
RST
SMCK
PMCK
TRV
TVD
PC
ECM
ECS
KICK
TRD
O
O
O
O
O
O
O
I
I
I
FOD
VREF
FBAL
TBAL
FE
TE
I
I
I
I
I RF ENV
VDET
OFT
TRCRS
I
O
RFDET
BDO
LDON
Description
Bit clock output for SRDATA
Serial data output
Identification signal output of Lch and Rch
Connected to GND
Digital audio interface output
Power supply (Digital)
com command clock signal input
com command load signal input
com command data input
Non connect
Non connect
(Data is latched at signal's rising point)
Non connect
Non connect
Outside clock for sub-code Q resister input
Sub-code Q -code output
Connected to GND
Status signal
(CRC,CUE,CLVS,TTSTOP,ECLV,SQOK)
Reset signal input (L:Reset)
Non connect
Non connect
Traverse enforced output
Traverse drive output
Non connect
Spindle motor drive signal (Enforced
mode output) 3-State
Spindle motor drive signal (Servo error
signal output)
Kick pulse output
Tracking drive output
Focus drive output
Reference voltage input pin for D/A
output block (TVD,FOD,FBA,TBAL)
Focus Balance adjust signal output
Tracking Balance adjust signal output
Focus error signal input(Analog input)
Tracking error signal input(Analog input)
RF envelope signal input(Analog input)
Vibration detect signal input(H:detect)
Off track signal input(H:off track)
Track cross signal input
RF detect signal input(L:detect)
BDO input pin(L:detect)
Laser ON signal output(H:on)
I
I
I
I/O
I/O
I
I
II
I
I
Description
Non connect
Non connect
TES
PLAY
WVEL
ARF
IREF
DRF
DSLF
PLLF
Non connect
RF signal input
Reference current input pin
Bias pin for DSL
Not used
Loop filter pin for DSL
Loop filter pin for PLL
Power supply(Analog)
Connected to GND(Analog)
Non connect
Clock input for subcode/serial output
Non connect
Non connect
Non connect
I
I
I
Connected to GND(for X'tal oscillation
circuit)
I
I
O
O
O
O
O
O
O
O
-
O
O
O
Non connect
Power supply(for X'tal cscillation circuit)
PLL loop filter terminal for jitter absorption
Ground terminal for audio DAC
PEM output terminal 1C
Input of 16.9344MHz X'tal oscillation circuit
Output of X'tal oscillation circuit
VCOF
AVDD2
AVSS2
EFM
PCK
PDO
SUBC
XSEL
VSS
XI
X2
VDD
VCOF2
AVSS1
OUT1C
OUT1D
OUT2D
OUT2C
AVDD1
DEMPO
CK384
IOSEL
TEST
SBCK2
SUBC
SBCK
CLDCK
IPFLAG
BCKI
LRCKI
SDATI
DEMPI
I
I
I
I
I
I
I
I
I
PEM output terminal 1D
PEM output terminal 2D
PEM output terminal 2C
Power supply for audio DAC
384fs clock output
Mode switch terminal
Test mode setting terminal
Sub code/data reading clock input
Sub code/serial output
Clock input for sub code/serial output
Sub code /frame clock signal output terminal
Interpolation flag signal output H:Interpolation
IOSEL:L The outside DEMPO input terminal
SRDATA input terminal
When IOSEL is "L", LRCK input H:Lch data
L:Rch data
When IOSEL is "L", BCK input