KS-FX8
1-24 (No.49826)
4.9 LC75873NW (IC601) : LCD Driver
• Pin layout
• Block diagram
• Pin function
60 41
1 20
40
21
61
80
VDD1
VDD2
INH
OSC
CLOCK
GENERATOR
COMON
DRIVER
SEGMENT DRIVER
SHIFT REGISTOR
ADDRESS
DETECTOR
VSS
VDD
DI
C
L
C
E
S5
S4/P4
S3/P3
S2/P2
S1/P1
S62
S66
COM1
COM2
COM3
Pin No.
Pin name
I/O
Description
79,80
1,2,3
to 66
S1/P1 to S4/P4
S5 to S68
O Segment outouts for displaying the display data transferred by serial data input.
The S1/P1 to S4/P4 pins can be used as generalpurpose output ports under serial data control.
67
78
69
COM1
COM2
COM3
O Common driver outputs.
The frame frequency f0 is given by :
f0 = (FOSC/384)Hz.
74
OSC
I/O Oscillator connection
An oscillator circuit is formed by connecting an external resistor and capacitor to this pin.
Serial data transfer inputs.
Connected to the controller.
CE:Chip enable
CL:Synchronization clock
DI:Transfer data
I Display off control input
• INH= "L"(VSS) ---Display forced off
S1/P1 to S4/P4 = "L"
(These pins are forcibly set to the segment output port function and held at the low level.)
S5 to S68 = "L"
COM1 to COM3"L"
• INH = "H"(HDD)---Display on
However, serial data transfer is possible when the display is forced off by this pin.
71
VDD1
I Used for applying the LCD drive 2/3 bias voltage externally. Must be connected to VDD2 when a 1/2
bias drive scheme is used.
72
VDD2
I Used for applying the LCD drive 1/3 bias voltage externally. Must be connected to VDD1 when a 1/2
bias drive scheme is used.
70
VDD
- Power supply connection. Provide a voltage of between 3.0 and 6.0V.
73
VSS
- Power supply connection. Connect to ground.
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