(No.49858)1-17
4.2
IC-PST600M/G/-W (IC702) : System reset
• Block diagram
4.3 K6R1008VDTI10-X (IC451) : 128K x 8 Bit High-Speed CMOS Static RAM
• Pin layout
• Block diagram
IN
Vout
GND
1
3
2
OP1
Co1
A
0
A
1
A
2
A
3
CS
I/O
1
I/O
2
V
CC
V
SS
I/O
3
I/O
4
WE
A
4
A
5
A
6
A
7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A
16
A
15
A
14
A
13
OE
I/O
8
I/O
7
V
SS
V
CC
I/O
6
I/O
5
A
12
A
11
A
10
A
9
A
8
Clk Gen.
Pre-Charge Circuit
Memory Array
512 Rows
256x8 Columns
Row Select
I/O Circuit
Column Select
Data
Cont.
CLK
Gen.
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
I/O
1
to I/O
8
CS
WE
OE
A
10
A
9
A
12
A
11
A
14
A
13
A
16
A
15
Function
Address inputs
I/O1,I/O2 Data inputs/outputs
Power (+3.3V)
9
VSS
Ground
10,11
I/O3,I/O4 Data inputs/outputs
12
WE
Write enable
13 to 21
A4 to A12
Address inputs
22,23
I/O5,I/O6 Data inputs/outputs
24
VCC
Power (+3.3V)
25
VSS
Ground
26,27
I/O7,I/O8 Data inputs/outputs
28
OE
Output enable
29 to 30 A13 to A16 Address inputs
Pin No.
Symbol
Function
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9
9
2
8
9
4
2
9
8
TEL 13942296513
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
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