NJU26209
- 2 -
Ver.2008-12-04
Hardware Block Diagram
Fig. 1 NJU26209 Hardware Block Diagram
SD
SD
SD
SDO
O
O
O1
11
1
SERIAL
SERIAL
SERIAL
SERIAL
HOST
HOST
HOST
HOST
INTERFACE
INTERFACE
INTERFACE
INTERFACE
AD1/SDIN
AD1/SDIN
AD1/SDIN
AD1/SDIN AD2/SSb
AD2/SSb
AD2/SSb
AD2/SSb
SCL/SCK
SCL/SCK
SCL/SCK
SCL/SCK
SDA/SDOUT
SDA/SDOUT
SDA/SDOUT
SDA/SDOUT
RESETb
RESETb
RESETb
RESETb
MCK
MCK
MCK
MCK
CLK
CLK
CLK
CLK
CLKOUT
CLKOUT
CLKOUT
CLKOUT
TIMING
TIMING
TIMING
TIMING
GENERATOR
GENERATOR
GENERATOR
GENERATOR
/ PLL
/ PLL
/ PLL
/ PLL
DATA
DATA
DATA
DATA
RAM
RAM
RAM
RAM
FIRMWARE
FIRMWARE
FIRMWARE
FIRMWARE
ROM
ROM
ROM
ROM
PROGRAM
PROGRAM
PROGRAM
PROGRAM
CONTROL
CONTROL
CONTROL
CONTROL
ALU
ALU
ALU
ALU
ADDR
ADDR
ADDR
ADDRESS
ESS
ESS
ESS GENERATION
GENERATION
GENERATION
GENERATION UNIT
UNIT
UNIT
UNIT
24
24
24
24-
--
-BIT
BIT
BIT
BIT
x
xx
x
24
24
24
24-
--
-BIT
BIT
BIT
BIT
MULTIPLIER
MULTIPLIER
MULTIPLIER
MULTIPLIER
DSP
DSP
DSP
DSP ARITHMETIC
ARITHMETIC
ARITHMETIC
ARITHMETIC UNIT
UNIT
UNIT
UNIT
BCK
BCK
BCK
BCKO
O
O
O
SERIAL
SERIAL
SERIAL
SERIAL AUDIO
AUDIO
AUDIO
AUDIO
INTERFACE
INTERFACE
INTERFACE
INTERFACE
LRO
LRO
LRO
LRO
BCKI
BCKI
BCKI
BCKI
LRI
LRI
LRI
LRI
General I/O
General I/O
General I/O
General I/O
INTERFACE
INTERFACE
INTERFACE
INTERFACE
SEL
SEL
SEL
SEL
L/Rout
L/Rout
L/Rout
L/Rout
SDI
SDI
SDI
SDI0~3
0~3
0~3
0~3
In
In
In
Input
put
put
put
WDC
WDC
WDC
WDC
SDO
SDO
SDO
SDO2
22
2
C/SW
C/SW
C/SW
C/SWout
out
out
out
SDO
SDO
SDO
SDO3
33
3
LM/RMout
LM/RMout
LM/RMout
LM/RMout
PROC
PROC
PROC
PROC
MUTEb
MUTEb
MUTEb
MUTEb
SDO
SDO
SDO
SDO0
00
0
L
L
L
LB
B
B
B/R
/R
/R
/RB
B
B
Bout
out
out
out