JPS PTG-10, Installation And Operation Manual, Page: 17 / 26

PTG-10 Operations Manual
Interoperability Now!
4-1
4
Theory of Operation
4.1
General
This section gives enough detail about the theory of operation in regard to the audio and power
supply sections to allow them to be trouble shot in the field.
4.2
Tone Circuit
Refer to Figure 5-1. Terminal block JP1interfaces all inputs and outputs between the PTG-10
and the outside world. Receiver Audio enters the unit at terminals 4 (RX In) and 1 or 7 (ground).
This audio is routed to a mixer amp; where it can be mixed with a pilot tone.
The tone oscillator circuit generates the pilot tone. A microcontroller circuit outputting data to a
D/A converter generates the pilot tone. The tone is produced using an ATMEL AVR Mega8L
micro controller. The Mega8L reads the status of the tone selector switch (SW1) and constantly
monitors both the COR and /COR input. When either an active low signal is detected on the
/COR input or an active high signal is detected at the COR input, the Mega8L produces the pilot
selected via switch SW1. The Mega8L generates the proper asynchronous serial data, sync line
and clock for the D/A to produce the analogue equivalent to the outputted data. The D/A output
is then sent to a Sallen-Key Butterworth filter to remove all of the composite harmonic energy.
The result is a clean sine wave at the selected frequency.
The output of the filter circuit is sent to the tone level POT R4. The tone level is adjustable from
-20 dBm to +9 dBm via R4 (this level can be measured at test point TP4). The tone is now mixed
with the receiver audio in an op-amp mixing circuit (U2A) where it is routed to the output stage
consisting of an inverting amplifier with a level control in the feedback loop. The output of the
mixer circuit can be observed at test point TP2. The value of this pot in the feedback loop is
balanced with the value of the input resistor to give a range of 30 dB from -30 to +4 dB of gain.
The balanced output is sent to pins 5 and 6 of JP1. The final output can be seen with an
oscilloscope on test point TP1.
4.3
Power Supply
Power is fed into the unit via pin 8 of JP1 and ground on pins 1 and 7; this is shown on Figure
5-1 and Figure 5-3. The input power needs to be in the range of +11 to +15 VDC for the unit to
function. The input voltage is filtered and then sent in three directions. First, the input voltage
is sent directly as +12 VDC nominal (actual range is +11 to +15 VDC). It’s also sent to a five-
volt regulator, and to a positive to negative converter producing -10 VDC. The positive to
negative converter works as follows, the in12 VDC is inputted into a 555-timer chip.
The output is a 12 VDC square wave, the square wave is sent to a diode pump made up of CR1
and CR2. The diode pump working in combination with C27 a 470 uF cap forms a -10 VDC
supply. Under normal conditions the unit should draw approximately 40 mA.