SX8 User Manual
G-‐UM-‐00004 Rev 006
19 of 45
Status Byte Register
The status byte register contains the summary bits for each of the
structures implemented in the switch, the master summary bit (MSB)
and the request for service bit (RQS).
•
Bit 0 is not used.
•
Bit 1 is not used.
•
Bit 2 (settle bit) is cleared when the devices is in the process of
switching channels. This bit is set to 1 once the device is settled.
•
Bit 3 (questionable summary) is the summary bit for questionable
status structure. It is set if any bit in the questionable event status
register is set while the corresponding bit in the questionable event
enable register is set.
•
Bit 4 (message available) is set to 1 when a response message is
available in the output queue.
•
Bit 5 (event summary bit) is the summary bit for the standard event
status structure. The ESB summary message bit is set if any bit in
the standard event status register is set while its corresponding
value in the standard event status enable register is set.
•
Bit 6, as the service request bit, is set to 1 if a service request has
been generated.
Bit 6, as the master summary bit, is set when there is at least one
reason for the switch to request service from the controller. That is,
the master summary bit is set if any summary bit in the status byte
register is set and if the corresponding bit in the service request
enable register is also set.
Status Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
operation
summary
(OSB)
request for
service
or
master
summary
event
summary
(ESB)
message
available
(MAV)
questionable
summary
(QSB)
settle
bit
(STL)
not
used
not
used
Read with
By serial polling
*STB?
Written to with
Cannot be written to
Cleared by
*CLS
common command
