CV-M71A
-21-
To inhibit the internal XSG pulse and continue the accumulation, the external sensor gate control signal should
be low during line 28, where the internal XSG is placed. Refer to Figure 27 on page 21.
The sensor gate control signal can be synchronized by the VD signal.
For video out timing details, refer to Figure 12 on page 8, Figure 13 on page 9, Figure 25 on page 20 and
Figure 27 on page 21.
To use this mode:
Important notes on using this mode:
•
External sync system should follow the camera scanning system.
•
The ext. HD/VD phase relations should follow the synchronization shown in Figure 17 on page 12.
•
After power up the camera, apply more than 1 SG pulse before operation.
FIGURE 26.Vertical timing for Sensor Gate Control
FIGURE 27.Sensor Gate position in line number 30
Set function:
Trigger mode to
Sensor gate control
TR=3
Other functions and settings
Input
Ext. SG control to trigger input
6-pin Hirose or
12-pin Hirose
Sensor Gate Control
Sensor Gate
Control Pulse
WEN OUT
SYNC OUT
int_XSUB
int_XSG
(Exposure)
XEEN OUT
Video out
Always High
Always Low
SG Disable
No Data
Sensor Gate Control (Gate Position)
Sensor Gate
Control Pulse
WEN OUT
SYNC OUT
int_XSG
SG Disable
29 Line
30 Line
