JAI CV-A2, Operation Manual, Page: 6 / 35

CV-A2
5.3. Input and Output Circuits
In the following the principle for the input and output circuits for video and timing signals are
shown. Jumper settings are shown as for factory default.
300 mV
420 mV
GND
75
Video
Output
NC
CXA1310
32
BNC
300 mV
420 mV
300 mV
420 mV
GND
75
Video
Output
NC
CXA1310
32
BNC
5.3.1. Video output
The video output on the BNC connector is a 75
Ω
DC coupled circuit. The video level is shown with
75
Ω
termination. The composite sync signal can be
disabled. (SO=0).
Pin #4 on the 12-pin connector is an ac coupled video
output. Termination should be >1k
Ω
. It can be change to
iris video output for lens iris control. (IS=1).
0.7Vpp
>1k
Ω
termination
GND
75
Video output
Video
Pin #4/12
Iris video
High impedance
IS=1
IS=0
0.7Vpp
>1k
Ω
termination
GND
75
Video output
Video
Pin #4/12
Iris video
High impedance
IS=1
IS=0
Don’t use pin #4 as primary video output.
Fig. 4. Video output.
5.3.2. Trigger input
The trigger input is AC coupled. To allow
a long pulse width, the input circuit is a
flip flop, which is toggled by the negative
or positive differentiated spikes caused by
the falling or rising trigger edges.
GND
+5V
33k
TTL
1k
GND
100n
1k
Trigger
input
33k
100k
1n
NC 1k
#5/6
#11/12
100
GND
+5V
33k
TTL
1k
GND
100n
1k
Trigger
input
33k
100k
1n
NC 1k
#5/6
#11/12
100
The trigger polarity can be changed.
Trigger input level 4 V
±
2 V.
The trigger-input impedance is 1 k
Ω
.
Fig. 5. Trigger input.
+5V
47p
33k
TTL
1k2
GND
10
µ
4k7
VD HD
Input/output
+
75
SW502
1k
1n
From VD HD
output
SW501
+5V
47p
33k
TTL
1k2
GND
10
µ
4k7
VD HD
Input/output
+
75
SW502
1k
1n
From VD HD
output
SW501
5.3.3. HD and VD input
The input circuit for external HD and VD
signals are shown. It can be 75
Ω
terminated
by closing SW502. SW501 will switch to output
the internal HD and VD signal.
HD and VD input level is 4 V
±
2 V.
Fig. 6. HD and VD input.
5.3.4. HD, VD, PCLK, WEN and EEN output
Output circuit for these signals are 75
Ω
complementary emitter followers. It will deliver a
full TTL signal. Output level
≥
4 V from 75
Ω
. (No
termination).
GND
+5V
10
10
10k
10k
67
TTL
220
VD, HD
WEN/ EEN
PCLK
WEN
#10/12
#6/6
#9/12
SW501
GND
+5V
10
10
10k
10k
67
TTL
220
VD, HD
WEN/ EEN
PCLK
WEN
#10/12
#6/6
#9/12
SW501
The WEN polarity can be changed.
EEN/WEN signal on pin #6/6 can be changed to
WEN if EW=1.
Fig. 7. HD, VD, PCLK, WEN and EEN output.
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