ADwin-Gold
Hardware Manual, Version 2.3
37
ADwin
9.3.2 Four Edge Evaluation
This mode determines clock and direction of two signals, which are intput phase-
shifted by 90 degrees to the inputs A and B. The count direction is determined
by the temporal sequence of the rising and falling edges of the two input signals.
Please note:
– The counter counts 4 edges in a cycle.
– The maximum count frequency is 20 MHz. Together with the 4 edges per
cycle it will result in a maximum input frequency of 5 MHz.
– The time between an edge at A and an edge at B must not be shorter than
50 ns. Impulse widths or pause durations shorter than 100 ns are not inc-
remented.
– Changing the phase-shift will have an effect on the maximum input frequency.
If it differs from 90 degrees, the maximum input frequency of 5 MHz
decreases for instance to 45 degrees at 2.5 MHz.
Programming example
Initialize
disable counter
clear counter
external clock input at CLK input
activate mode four edge evaluation
set input CLR/LATCH to CLR mode
enable counter
latch current counter values to latch register A
read out latch register A
evaluate counter values in program
Control-Registers
32 bit Counter #1...#4
32 bit Latch A (#1...#4)
CLK
EN
CLR
CLK
ADwin-GOLD
bus
Data
Data
DIR
CLR
DIR
4k7
4k7
4k7
DIR
INIT:
CNT_ENABLE(0)
CNT_CLEAR(1)
CNT_MODE(0)
CNT_INPUTMODE(0)
CNT_ENABLE(1)
CNT_SET(0)
. . .
. . .
EVENT:
CNT_READLATCH(1)
. . .
CNT_LATCH(1)
9.3.2 Four Edge Evaluation
