Jackson Labs FireFox, User Manual

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FireFox Synthesizer User Manual
8 © 2006 Jackson-Labs
1.4.6 Using the CMOS and LVDS outputs
The FireFox unit is unique in that it can produce both analog (sine wave) outputs, and digital outputs
simultaneously. Four front panel digital outputs are available. All four outputs on the front panel are
driven in parallel, within their respective output frequency ranges as indicated by the VALID LED’s.
Please note that the LVDS outputs have an under-range from 2-10MHz. The outputs are driven in this
under-range, but are not guaranteed to be jitter-free. The CMOS output is usable from 0Hz to
350MHz, with an over-range up to 390MHz in which the output is driven and usable but not
guaranteed to be jitter-free.
1.4.6.1 Connecting a cable to the LVDS Outputs
Two differential, complementary LVDS signals are available on SMA connectors on the front panel
of the FireFox unit. Typically LVDS signals are connected to 50 Ohm transmission lines (cables) and
differentially end-terminated with a 100 Ohm termination resistor between the Positive and Negative
LVDS signals. The user may also end-terminate the signals individually to Ground using 50 Ohm
end-terminators. The output voltage levels will change slightly when terminating to Ground.
By using 50 Ohm ground terminated cables it may be possible to drive PECL inputs. A series
capacitor may also be used to remove the LVDS DC-Offset present on the LVDS SMA connectors.
The signal swing on the two LVDS connectors is approximately 300mV peak on each output, and
this may be used to drive two independent analog inputs with ca. -7dBm level when connected via
AC-coupling.
1.4.6.2 Connecting a cable to the CMOS Output
The FireFox CMOS output is designed to drive a 50 Ohm transmission line or cable without any
end-termination (open-ended cable). Voltage levels are up to 5Vpp when using open-ended cables.
The FireFox CMOS output may also drive 50 Ohm end-terminated cables without damage and with
a slightly more than 50% reduction on the high-level output voltage. The rise and fall times of the
FireFox CMOS output are on the order of 1V/ns or faster.
Please note that the CMOS output is low-pass filtered for output frequencies below 30MHz to reduce
DDS-generated spurs above 30MHz, and thus to reduce the output jitter. The CMOS output provides
the output signal with the least spurs present for output frequencies below 30MHz of all of the
FireFox front-panel outputs.
1.4.6.3 Selecting the Front Panel CMOS Output Voltage
The Front Panel CMOS peak-to-peak output voltage is selectable via a switch on the back panel of
the FireFox Desktop unit, and via a Jumper on the FireFox OEM PCB. The switch is visible in the
upper left hand corner of
Figure 1.6 . Use JP12 located close to the CMOS output BNC connector to
select the CMOS output voltage when using the FireFox OEM PCB.
The CMOS output voltage can be selected to be either 0V to 3.3V, or 0V to 5.0V when driving
un-terminated transmission lines. This voltage level will be reduced by slightly more than 50% when
driving an end-terminated 50 Ohm transmission line.