37
3.5.4 EDO RAS# To CAS# Delay
This field specifies the EDO/FPM DRAM timing from RAS# to CAS#. This is for experienced
users only.
Options
Description
2
2 system clocks
3 (*)
3 system clocks
3.5.5 EDO RAS# Precharge Time
This field specifies the EDO/FPM DRAM timing for RAS# pre-charge. This is for experienced
users only.
Options
Description
3 (*)
3 system clocks
4
4 system clocks
3.5.6 EDO DRAM Read Burst
This field specifies the timing of EDO/FPM DRAM burst read. This is for experienced users only.
Options
Description
x222 (*)
2 system clocks for each burst read cycle
x333
3 system clocks for each burst read cycle
3.5.7 EDO DRAM Write Burst
This field specifies the timing of EDO/FPM DRAM burst write. This is for experienced users
only.
Options
Description
x222 (*)
2 system clocks for each burst write cycle
x333
3 system clocks for each burst write cycle
3.5.8 DRAM Data Integrity Mode
When enabled, the BIOS will use ECC (Error Checking and Correcting) protocol to increase
integrity of system data. When ECC is selected, all memory modules the system used must
support ECC.
Options
ECC
Non-ECC (*)
