iSystem iC5500 Hardware Reference Manual Download Page 12 | Manualshive

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iSYSTEM, March 2017

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Hardware Configuration dialog, Communication page



Universal Serial Bus (USB)

- select when the Emulator is attached to the PC's USB port. The

Emulator is selected in the Device pull-down menu. When the Emulator is connected to the USB port of a
computer for the first time, Windows will detect a new device and may prompt you for the driver for it.
Specify the path to the USB directory in the winIDEA installation directory.

If only one emulator is

connected to the PC via the USB then the Device combo box can be left empty (recommended). In this
case, if you exchange the emulator with another one, you don’t have to change the communication
settings.



TCP/IP

– This option sets the TCP/IP properties of the iC5700. See ‘Setting up TCP/IP communication’

section for more details on TCP/IP setup.

Use the 'Test' button to test the communication settings.

Communication test window

Setting up TCP/IP communication

If the Emulator is connected using the Ethernet, its TCP/IP settings must be configured on both sides: the
Emulator and in winIDEA.

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Summary of Contents for iC5500

Page 1: ...our alternative products iSystem constantly yields for development and therefore certain pictures in this documentation may vary slightly from the actual product you received The differences should be minor but should you find more serious inconsistencies of the product with the documentation please contact your local distributor for more information This document and all documents accompanying it...

Page 2: ...rst use It remains to the user only to connect a specific cable adapter and connecting the debug and test tool to the embedded target iC5500 Base Unit iC5500 Base Unit is a base platform connecting to the PC via the TCP IP or the USB 3 0 port The iC5500 USB 3 0 port is backward compatible with the USB 2 0 ports on the PC side Make sure that the USB 3 0 cable delivered along the iC5500 is being use...

Page 3: ...ith the iC5500 and connect always to DTM 1 connector located on top of the iC5500 Example of the debug cable adapter for Cortex architecture without the attached cable 25 cm 40 pin flat cable Connecting guidelines for debug cable adapters delivered without pre attached flat cable Be gentle when connecting one connector to the other Do not use any excessive force observe the orientation key and con...

Page 4: ...e that iSYSTEM provides no guarantee for working operation for these lengths Certain debug cable adapters for example 16 bit Nexus IC50152 16 bit ETM IC50115 and 10 pin Infineon DAP IC50163 come delivered with two 30 pin and 40 pin flat cable pre attached With these 25 cm 40 pin flat cable which comes with the iC5500 is not needed Example of Infineon DAP debug cable adapter with two flat cables pr...

Page 5: ...er pins of the DTM 1 connector Finally connect the debug cable adapter to the target Disconnecting guidelines In order to disconnect the flat cables from the iC5500 DTM 1 or 2 connector squeeze the two metal latches on the cable connector from the side and pull the cable from the iC5500 DTM 1 respectively 2 connector iC5500 I O Module optional Through this module the iC5500 development and test sy...

Page 6: ...easurement probe uses these two inputs for power measurement Analog outputs 2 channels 8 bit DACs 4 5V bipolar output 7mA drive 100 ohm output resistance Optional 10MHz temperature compensated precision oscillator TCXO for a high accuracy long duration trace analyzer session measurements iC5500 with the I O module assembled All digital signals are 3 3V LVTTL compatible and are ESD protected All an...

Page 7: ...gital outputs 10 pin header for 2 analog outputs 2 BNC connectors for 2 analog inputs 10 pin header for Power Measurement Port All connectors except the BNCs are standard Berg 2 54mm 100mils raster For analog inputs standard scope probes can be used For more details on I O module and its use refer to a separate standalone document titled I O Module user s manual ...

Page 8: ...igarette lighter plug can be ordered under the IC30000 PS CAR12V ordering code IC30000 PS CAR12V Note Use only original iSYSTEM accessories for powering the iC5500 If you wish to use a power supply different from the delivered one please consult with iSYSTEM first iC5500 System Power On Power Off Sequence In general the iC5500 Analyzer and the target must be in the same power state Both must be on...

Page 9: ...fore the target when shutting down the system switch OFF the target before the iC5500 If emulator is switched off but target is left on forcing 5V through protection diodes on the DTM I O pins could activate level translation buffers in improper way They in turn could drive excessive current through 47E resistors that would eventually be overheated and completely blown The same can happen in rever...

Page 10: ...ed by power supply target emulator which does not have the power outlet ground connected with the power supply ground power outlets which have different ground potentials PC when the iC5500 connects to the PC through the USB port Connecting a dedicated grounding wire which is shipped with the iC5500 unit between the iC5500 system and the target before the target debug cable adapter is connected to...

Page 11: ...IDE license needs to be requested from iSYSTEM Note that the iC5500 starts in 30 days evaluation period when being used for the first time This gives user sufficient time to obtain winIDEA license init string before evaluation period expires CPU architecture multi core and trace license are programmed by the user if certain license is ordered after the initial iC5500 order Below picture shows the ...

Page 12: ...stallation directory If only one emulator is connected to the PC via the USB then the Device combo box can be left empty recommended In this case if you exchange the emulator with another one you don t have to change the communication settings TCP IP This option sets the TCP IP properties of the iC5700 See Setting up TCP IP communication section for more details on TCP IP setup Use the Test button...

Page 13: ... The IP Address available for the Emulator to use the Subnet Mask and the default gateway if needed are usually defined by your network administrator The TCP Port can be any port between 1024 and 65535 which is not already used By default the TCP port 5313 is used For the information if this port address could cause any conflicts and for an alternative port address also contact your network admini...

Page 14: ...ication should be up and running Configuration with Automatic Discovery Select the Hardware Communication tab Display of discovered emulators First select TCP IP type of communication Then select the Use global discovery on UDP port 58371 In the pull down window all emulators found on the network will be shown The correct emulator can be identified by its serial number Select the emulator and pres...

Page 15: ... 210 121 92 92 without quotes The result should be Request timed out If the result of the command is anything else like Reply from the IP is already taken and you should choose another one If the result is correct type in ping ip_address w 500 t in the above example this would mean ping 210 121 92 92 w 500 t This command pings the IP address every 500 milliseconds until you stop it with Control C ...

Page 16: ...design or a combination of both THE IC5500 has the ability to compensate for these issues via Trace Line Calibration functionality which allows shifting threshold voltage and clock phase at the capture time of the trace data When Trace Line Calibration is performed it auto scans over these two dimensions and searches for valid and invalid settings and finds an optimum data eye Example Let s assume...

Page 17: ...er frequency with large Data eyes Trace Line Calibration window scan has been performed and applied X invalid area valid area R recommended o currently used Higher frequency Valid Data eyes shown on upper data signal and how the clock lower must be delayed ...

Page 18: ...ver characteristics Trace clock should be clean of crosstalk if possible with double distance to closest nets Trace clock should have only point to point connection any stubs should be avoided It is strongly recommended also for other data lines to be point to point only If any stubs are needed they should be as short as possible when longer are required there should be a possibility to optionally...

Page 19: ...overflowed and some portion of the trace data will be missing It doesn t mean any hardware failure Possible solutions lower the target CPU clock increase Nexus clock divider which yields lower Nexus clock but at the same time Nexus is more prone to overflows then changing the trace port width e g from 16 bit to 12 bit or from 12 bit to 4 bit reduces the Nexus information bandwidth Note that possib...

Page 20: ... Cable Adapter IC50154 51 pin GLENAIR Cable Adapter IC50156 50 pin Samtec MPC5xxx Nexus 16 bit Cable Adapter IC50160 16 pin 2 54mm Infineon JTAG Cable Adapter IC50160 ECU14 10 pin 1 27mm Tricore ECU14 Cable Adapter IC50160 MEDC17 10 pin 1 27mm Tricore MEDC17 Cable Adapter IC50162 6 pin 2 54mm Infineon I2C Cable Adapter IC50163 10 pin 1 27mm Infineon DAP2 Wide Cable Adapter IC50164 22 pin Samtec ER...

Page 21: ...in Pin Signal Signal description Signal direction I Reference voltage VTref 1 2 SWDIO TMS SWD JTAG I O Ground GND 3 4 SWCLK TCK SWD JTAG O Ground GND 5 6 SWO TDO SWD JTAG I Ground GND 7 8 NC TDI SWD JTAG O Ground GND 9 10 nSRST System Reset I O Ground GND 11 12 TRCLK Trace Clock I Ground GND 13 14 TRD0 Trace Data 0 I Ground GND 15 16 TRD1 Trace Data 1 I Ground GND 17 18 TRD2 Trace Data 2 I Ground ...

Page 22: ... Signal Pin Pin Signal Signal description Signal direction I Reference voltage VTref 1 2 NC Not Connected O JTAG nTRST 3 4 GND Ground O SWD JTAG NC TDI 5 6 GND Ground I O O SWD JTAG SWDIO TMS 7 8 GND Ground O SWD JTAG SWDCLK TCK 9 10 GND Ground I Return TCK RTCK 11 12 GND Ground I SWD JTAG SWO TDO 13 14 GND Ground I O System Reset nSRST 15 16 GND Ground O Debug request DBGRQ 17 18 GND Ground I Deb...

Page 23: ... side Signal direction Signal description Signal Pin Pin Signal Signal description Signal direction Output Standard JTAG TMS 1 2 nTRST Standard JTAG Output Output Standard JTAG TDI 3 4 GND Ground Input Reference voltage VTref 5 6 NC Not connected Input Standard JTAG TDO 7 8 GND Ground Input Return TCK RTCK 9 10 GND Ground Output Standard JTAG TCK 11 12 GND Ground Input Debug Acknowledge BERR 13 14...

Page 24: ... Signal Signal description Signal direction Not Connected NC 1 2 GND Ground O Debug JTAG nTRST 3 4 GND Ground O Debug JTAG TDI 5 6 GND Ground O Debug JTAG TMS 7 8 GND Ground O Debug JTAG TCK 9 10 GND Ground I Debug JTAG TDO 11 12 nSRST System Reset I O I Reference voltage VTref 13 14 GND Ground 14 pin ARM pinout Note 14 pin 2 54mm ARM Cable Adapter features resettable fuses on all pins These fuses...

Page 25: ...6 SWO TDO SWD JTAG I Ground GND 7 8 NC TDI SWD JTAG O Ground GND 9 10 nSRST System Reset I O Ground GND 11 12 TRCLK Trace Clock I Ground GND 13 14 TRD0 Trace Data 0 I Ground GND 15 16 TRD1 Trace Data 1 I Ground GND 17 18 TRD2 Trace Data 2 I Ground GND 19 20 TRD3 Trace Data 3 I 20 pin Cortex M pinout Blue colored signals are required for trace Note 20 pin 1 27mm AMPMODU Cortex M Cable Adapter featu...

Page 26: ...ARM ETM 16 bit cable adapter The following pinout is valid on the target side Signal direction Signal Pin Pin Signal Signal direction NC 1 2 NC NC 3 4 NC NC 5 6 TRACECLK I NC 7 8 NC I O nSRST 9 10 NC I TDO 11 12 VTref I NC 13 14 NC O TCK 15 16 TRACEPKT 7 I O TMS 17 18 TRACEPKT 6 I O TDI 19 20 TRACEPKT 5 I O nTRST 21 22 TRACEPKT 4 I NC 23 24 TRACEPKT 3 I NC 25 26 TRACEPKT 2 I NC 27 28 TRACEPKT 1 I ...

Page 27: ... pinout The following pinout is valid on the target side Signal direction Signal Pin Pin Signal Signal direction NC 1 2 NC NC 3 4 NC NC 5 6 TRACECLK I NC 7 8 NC I O nSRST 9 10 NC I TDO 11 12 VTref I NC 13 14 NC O TCK 15 16 TRACEPKT 7 I O TMS 17 18 TRACEPKT 6 I O TDI 19 20 TRACEPKT 5 I O nTRST 21 22 TRACEPKT 4 I I TRACEPKT 15 23 24 TRACEPKT 3 I I TRACEPKT 14 25 26 TRACEPKT 2 I I TRACEPKT 13 27 28 T...

Page 28: ...excessive current fades away Signals on pins 6 16 18 20 and 22 38 are protected via 47 ohm serial resistors The adapter connects to the target via a 38 pin Mictor connector Tyco Electronics 5767055 1 A target should feature a matching part for example Tyco Electronics 5767081 1 in SMT technology Texas Instruments TMS570 Microcontrollers Targets based on Texas Instruments TI ARM microcontroller can...

Page 29: ...owing pinout is valid on the target side Signal direction Signal Pin Pin Signal Signal direction I VTref 1 2 TMS O O TCK 3 4 TDO I O TDI 5 6 nSRST I O O RTCK 7 8 nTRST_PD O O nTRST_PU 9 10 NC NC 11 12 NC I TRACECLK 13 14 NC NC 15 16 GND I TRACECTL 17 18 NC I TRACEDATA0 19 20 NC I TRACEDATA1 21 22 NC I TRACEDATA2 23 24 NC I TRACEDATA3 25 26 NC I TRACEDATA4 27 28 NC I TRACEDATA5 29 30 NC I TRACEDATA...

Page 30: ...gnal Pin Pin Signal Signal description Signal direction I Reference voltage VTref 1 2 SWDIO TMS SWD JTAG I O Ground GND 3 4 SWCLK TCK SWD JTAG O Ground GND 5 6 SWO TDO SWD JTAG I Not connected KEY 7 8 NC TDI SWD JTAG O Ground GND 9 10 nSRST System Reset I O 10 pin Cortex M pinout Note 10 pin 1 27mm Cortex M Cable Adapter features resettable fuses on pins 1 2 4 6 8 and 10 These fuses protect debug ...

Page 31: ...1 27mm Cortex M Cable Adapter features resettable fuses on pins 1 2 4 6 8 and 10 These fuses protect debug signals against overcurrent and cycle back to a conductive state after the excessive current fades away The adapter connects to the target via a 10 pin 1 27mm connector for example SAMTEC FFSD 05 01 N A target should feature a matching part for example SAMTEC SHF 105 01 L D TH Note New adapte...

Page 32: ...nd GND 5 6 SWO TDO SWD JTAG I Not connected KEY 7 8 NC TDI SWD JTAG O Ground GND 9 10 nSRST System Reset I O NC_CAPGND 11 12 TRCLK Trace Clock I NC_CAPGND 13 14 TRD0 Trace Data 0 I Ground GND 15 16 TRD1 Trace Data 1 I Ground GND 17 18 TRD2 Trace Data 2 I Ground GND 19 20 TRD3 Trace Data 3 I 20 pin Cortex M pinout Blue colored signals are required for trace Note 20 pin 1 27mm Cortex M Cable Adapter...

Page 33: ...0 pin Cortex M pinout Blue colored signals are required for trace Note 20 pin 1 27mm Cortex M Cable Adapter features resettable fuses on pins 1 2 4 6 8 and 10 These protect debug signals against overcurrent and cycle back to a conductive state after the excessive current fades away Signals on pins 12 14 16 18 and 20 are protected via 100 ohm serial resistors The adapter connects to the target via ...

Page 34: ...Standard JTAG TCK 11 12 GND Ground I Emulation pins EMU0 13 14 EMU1 Emulation pins I I O System Reset nSRST 15 16 GND Ground I Emulation pins EMU2 17 18 EMU3 Emulation pins I I Emulation pins EMU4 19 20 GND Ground 20 pin Compact TI 20 pinout Jumpers J1 and J2 Jumpers J1 and J2 selects whether EMU0 J1 or EMU1 J2 is tied to pull up position 1 2 or directly to the GND position 2 3 EMU signals functio...

Page 35: ...valid on the target side Signal direction Signal description Signal Pin Pin Signal Signal description Signal direction I O BGND BGND 1 2 GND Ground Not connected NC 3 4 RESET System Reset I O Not connected NC 5 6 VTref Reference voltage I 6 pin BDM pinout Note 6 pin BDM Cable Adapter features resettable fuses on pins 1 2 4 and 6 These fuses protect debug signals against overcurrent and cycle back ...

Page 36: ...gnal description Signal Pin Pin Signal Signal description Signal direction I O BGND BGND 1 2 GND Ground I data out PDO 3 4 RESET System Reset I O I clock PDOCLK 5 6 VTref Reference voltage I 6 pin BDM pinout Note 6 pin BDM Cable Adapter features resettable fuses on pins 1 2 4 and 6 These fuses protect debug signals against overcurrent and cycle back to a conductive state after the excessive curren...

Page 37: ...e machine Because JTAG TAP state machine can be reset also by TMS and TCK this pin is optional also for the debugger If microcontroller has JCOMP pin but it is not connected to the target debug connector then it must be set to non active state in the target via a pull up resistor If not then JTAG TAP state machine remains in reset and debugging is not possible 14 pin 2 54mm MPC5xxx Cable Adapter f...

Page 38: ...efer to iSYSTEM Freescale MPC5xxx ST SPC56 Family On Chip Emulation technical notes document for more details on the Force periodic Nexus SYNC option use Note that the EVTI Nexus Event In CPU pin may be shared with other CPU functionalities For instance on MPC5516 the same pin can operate as GPIO EBI read write or EVTI Whenever the CPU pin is configured and used for EVTI alternate operation J2 mus...

Page 39: ...le adapter Jumper J2 EVTIN Under some circumstances it can happen that the debugger cannot find any absolute program counter message in the analyzed Nexus trace block Consequentially trace reconstruction fails and errors or nothing gets displayed in the trace window To avoid such situations the debugger can feed periodic signal to the EVTIN CPU pin connecting to the on chip Nexus engine which then...

Page 40: ...38 MSEO0 I MPC5xxx and SPC56 16 bit Nexus target pinout Blue colored signals are required for trace Note Mictor 38 pin MPC5xxx Nexus 8 bit Cable Adapter features resettable fuses on pins 9 10 11 12 15 17 19 and 21 These protect debug signals against overcurrent and cycle back to a conductive state after the excessive current fades away Signals on pins 16 18 20 22 24 26 28 30 32 34 36 and 38 are pr...

Page 41: ... reconstruction fails and errors or nothing gets displayed in the trace window To avoid such situations the debugger can feed periodic signal to the EVTIN CPU pin connecting to the on chip Nexus engine which then periodically generates and broadcasts program counter synchronization messages In order to use this feature jumper J2 must be bridged and the Force periodic Nexus SYNC option in the Hardw...

Page 42: ...a 47 ohm serial resistors The adapter connects to the target via a 38 pin Mictor connector Tyco Electronics 5767055 1 A target should feature a matching part for example Tyco Electronics 5767081 1 in the SMT technology Ordering code IAMIC38SAM50MPC IAMIC38SAM50MPC adapter Some targets based on Freescale Qorivva Power Architecture or PX Series Power Architecture microcontroller s e g MPC5675K can a...

Page 43: ...DO4 21 22 NC GND 23 24 GND I MDO5 25 26 NC I MDO6 27 28 NC GND 29 30 GND I MDO7 31 32 NC I MDO8 33 34 NC GND 35 36 GND I MDO9 37 38 NC I MDO10 39 40 NC GND 41 42 GND I MDO11 43 44 MDO13 I I MDO12 45 46 MDO14 I GND 47 48 GND I MDO15 49 50 NC 50 pin Samtec ERF8 Nexus target connector pinout Blue colored signals are required for trace The adapter connects to the target via a 50 pin ERM8 connector for...

Page 44: ...m pull down O O Standard JTAG TDI 3 4 TRST Standard JTAG O I Status optional HALTED 5 6 VTref Reference voltage I O Standard JTAG TCK 7 8 CKSTP_IN Status optional O O Standard JTAG TMS 9 10 NC Not Connected O Soft Reset SRESET 11 12 GND Ground O Hard Reset HRESET 13 14 NC Not Connected I Status optional CKSTP_OUT 15 16 GND Ground 16 pin Freescale COP target pinout Note 16 pin 2 54mm Freescale COP ...

Page 45: ...r instead of the popular 38 pin Mictor target debug connector The following pinout is valid on the target side Signal direction Signal Pin Pin Signal Signal direction NC 1 2 NC NC 3 4 NC I TDO 5 6 RDY O RESET 7 8 VTREF I O EVTIN 9 10 GND O TRST 11 12 GND O TMS 13 14 GND O TDI 15 16 GND O SWCLK TCK 17 18 GND I MDO0 19 20 GND I MCKO 21 22 GND I EVTO 23 24 GND I MSEO0 25 26 MDO9 I I MDO1 27 28 GND I ...

Page 46: ...nt and cycle back to a conductive state after the excessive current fades away Signals on pins 19 21 23 25 26 27 29 31 35 37 39 41 43 45 47 49 and GND are protected via 47 ohm serial resistors The adapter connects to the target via a 51 pin GLENAIR connector for example GLENAIR M83513 02 GN A target should feature a matching part for example GLENAIR M83513 01 GN ...

Page 47: ...ce reconstruction fails and errors or nothing gets displayed in the trace window To avoid such situations the debugger can feed periodic signal to the EVTIN CPU pin connecting to the on chip Nexus engine which then periodically generates and broadcasts program counter synchronization messages In order to use this feature jumper J2 must be bridged and the Force periodic Nexus SYNC option in the Har...

Page 48: ...ND 41 42 GND I MDO11 43 44 MDO13 I I MDO12 45 46 MDO14 I GND 47 48 GND I MDO15 49 50 NC MPC5xxx and SPC56 50 pin 16 bit Nexus target pinout Blue colored signals are required for trace Note 50 pin Samtec MPC5xxx Nexus 16 bit Cable Adapter features resettable fuses on pins 2 4 6 8 10 12 16 and 20 These protect debug signals against overcurrent and cycle back to a conductive state after the excessive...

Page 49: ... JTAG TDO 3 4 GND Ground O optional CPUCLK 5 6 GND Ground O Standard JTAG TDI 7 8 RESET Power On Reset O O Standard JTAG TRST 9 10 BRK_OUT Break Output I I Standard JTAG TCLK 11 12 GND Ground O Break Input BRK_IN 13 14 OCDS_E optional O Not Connected NC 15 16 NC Not Connected 16 pin Infineon JTAG target pinout Mandatory pins on the microcontroller side are TMS TDO TDI TRST TCLK and RESET BRK_IN an...

Page 50: ...n Signal Signal description Signal direction O Break Input BRK_IN 1 2 TRST Standard JTAG O Ground GND 3 4 TCLK Standard JTAG O O Standard JTAG TMS 5 6 BRK_OUT Break Output I O Power On Reset RESET 7 8 TDI Standard JTAG O I Reference voltage VTref 9 10 TDO Standard JTAG I 10 pin Bosch MEDC17 target pinout Mandatory pins on the microcontroller side are TMS TDO TDI TRST TCLK and RESET BRK_IN and BRK_...

Page 51: ...nal can be used optionally Note 10 pin 1 27mm TriCore ECU14 Cable Adapter features resettable fuses on all connected pins These protect debug signals against overcurrent and cycle back to a conductive state after the excessive current fades away Jumper J1 Jumper J1 has been put on the adapter only for making provision for future extensions of the ECU14 target connection The USERIO signal target de...

Page 52: ...emulator and programming mode selected During the debug download first user flash is erased then the application code programmed into the flash and at the end the complete flash is read back This last step is required since the code memory can be no longer read once the MCU is in the debug mode Beside of the user flash SP41 has also Firmware ROM which cannot be read by the debugger After the debug...

Page 53: ...oon as the power is applied to the target When Hot Attach command is issued from winIDEA the debugger connects to the MCU and control over the MCU is taken without resetting the MCU Depending on the target MCU refer to the XC166 XC2000 or the TriCore technical notes document for more details on Hot Attach configuration and use The following pinout is valid on the target side Signal direction Signa...

Page 54: ... on Hot Attach configuration and use The following pinout is valid on the target side Signal direction Signal description Signal Pin Pin Signal Signal description Signal direction I Reference voltage Vref 1 2 DAP1 Bidirectional data I O Ground GND 3 4 DAP0 DAP clock O Ground GND 5 6 DAP2 Bidirectional data I O Not Connected NC 7 8 USER_IN Optional O Ground GND 9 10 RESET System Reset I O 10 pin In...

Page 55: ...d is issued from winIDEA the debugger connects to the MCU and control over the MCU is taken without resetting the MCU Depending on the target MCU refer to the TriCore technical notes document for more details on Hot Attach configuration and use The following pinout is valid on the target side Signal direction Signal Pin Pin Signal Signal direction Not Connected 1 2 Vref I Not Connected 3 4 DAP0 O ...

Page 56: ...Connected NC 13 14 FLMD0 Flash Mode O I Reset In RESET IN 15 16 TOOL1 CLK Clock Input I 16 pin Renesas 78K0R Serial Debug target pinout If the Supply 5V to the target option is checked in the Hardware Emulation Options CPU Setup Advanced tab the debugger supplies 5V at Vcc pin pin 4 of the target debug connector which can be used to power the target Maximum target current consumption should not ex...

Page 57: ...G O Ground GND 5 6 TDI Debug JTAG O Ground GND 7 8 TRST Debug JTAG O Ground GND 9 10 NC Not Connected Ground GND 11 12 RESET CPU Reset I O Ground GND 13 14 FLMD0 Flash Mode O Ground GND 15 16 RDY Synchronization I Ground GND 17 18 TDO Debug JTAG I Ground GND 19 20 VDD Reference voltage I 20 pin Renesas V850 RH850 target pinout Note 20 pin 2 54mm V850 RH850 Cable Adapter features resettable fuses o...

Page 58: ...Reserved Ground GND B4 A4 Reserved Reserved Ground GND B5 A5 Reserved Reserved Ground GND B6 A6 Reserved Reserved Ground GND B7 A7 DDI N Wire O Ground GND B8 A8 DCK N Wire O Ground GND B9 A9 DMS N Wire O Ground GND B10 A10 DDO N Wire I Reserved Reserved B11 A11 DRST N Wire O Reserved Reserved B12 A12 RESET Reset O I Reference Voltage VTRef B13 A13 FLMD0 Flash Mode O 26 pin Renesas V850 target pino...

Page 59: ...checked in the Hardware Emulation Options CPU Setup Advanced tab the debugger supplies 5V at 5V OUT pin pin 10 of the target debug connector which can be used to power the target Maximum target current consumption should not exceed 50mA Note 10 pin Renesas 78K0R Serial Debug Cable Adapter features resettable fuses on all connected pins These protect debug signals against overcurrent and cycle back...

Page 60: ...Connected NC 5 6 NC Not Connected Not Connected NC 7 8 NC Not Connected O Communication line X1 9 10 NC Not Connected Not Connected NC 11 12 NC Not Connected I O Communication line X2 13 14 FLMD0 Flash Mode O I Reset In RESET IN 15 16 NC Not Connected 16 pin Renesas 78K0 Serial Debug target pinout The adapter connects to the target via a 10 pin 2 54 mm connector for example Yamaichi FAS 1001 2101 ...

Page 61: ...und O Reset Out RESET_OUT 13 14 GND Ground 14 pin Renesas RL78 Serial Debug target pinout If the Supply 5V to the target option is checked in the Hardware Emulation Options CPU Setup Advanced tab the debugger supplies 5V at VDD pin pin 8 of the target debug connector which can be used to power the target Maximum target current consumption should not exceed 50mA Some RL78 devices may have two power...

Page 62: ...Ground O Debug JTAG TRST 3 4 FLMD0 Flash Mode O I Debug JTAG TDO 5 6 FLMD1 Flash Mode O O Debug JTAG TDI 7 8 VTREF Reference voltage I O Debug JTAG TMS 9 10 NC Not Connected I Synchronization RDY 11 12 GND Ground I O CPU Reset RESET 13 14 GND Ground 14 pin Renesas RH850 target pinout Note 14 pin 2 54mm RH850 Cable Adapter features resettable fuses on all pins except for pin 11 These fuses protect ...

Page 63: ...ction Signal Pin Pin Signal Signal direction I JP05 RDY 1 2 RESET I O O JP02 TCK 3 4 JP00 TDI O O JP03 TMS 5 6 JP04 TRST O I JP01 TDO 7 8 FLMD0 O 3V3 9 10 GND 10 pin Renesas RH850 proprietary EPS target pinout Note 10 pin 1 27mm RH850 Cable Adapter features resettable fuses on all pins except for pin 1 and pin 10 These fuses protect debug signals against overcurrent and cycle back to a conductive ...

Page 64: ...ction I MDO12 1 2 MDO13 I I MDO14 3 4 MDO15 I I MDO9 5 6 NC NC 7 8 MDO8 I O NRESET 9 10 EVTI O I TDO 11 12 VTREF I I MDO10 13 14 RDY I O TCK 15 16 MDO7 I O TMS 17 18 MDO6 I O TDI 19 20 MDO5 I O TRST 21 22 MDO4 I I MDO11 23 24 MDO3 I NC 25 26 MDO2 I NC 27 28 MDO1 I NC 29 30 MDO0 I NC 31 32 EVTO I NC 33 34 MCKO I NC 35 36 MSEO1 I O FLMD0 37 38 MSEO0 I Mictor 38 pin Renesas RH850 F1H 16 bit Nexus tar...

Page 65: ... the target side Pin Signal Signal description Signal direction 1 VDD Reference voltage I 2 SWIO Debug SWIM pin I O 3 GND Ground 4 RST Reset O 4 pin ERNI ST STM8 target pinout Note 4 pin ERNI ST STM8 Cable Adapter features resettable fuses on all pins These fuses protect debug signals against overcurrent and cycle back to a conductive state after the excessive current fades away The adapter ends w...

Page 66: ...ing including some troubleshooting tips Operating Environment Operating temperature between 10 C and 40 C Humidity 5 to 80 RH Storage temperature between 10 C and 60 C Dimensions 155 x 155 x 65 mm Note Consult with iSYSTEM when using equipment outside of these parameters Disclaimer iSYSTEM assumes no responsibility for any errors which may appear in this document reserves the right to change devic...

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