Intrinsyc Open-X 8M User Manual Download | Manualshive

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Open-X™ 8M Development Kit based on the NXP i.MX8™ Processor User Guide Version 1.0

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Copyright Intrinsyc Technologies Corporation

Audio Stereo Line-out Jack J1200

Figure 3-16 3.5mm Audio Line-out Jack J1200

The main Audio DAC used on the Open-X 8M board is the CIRRUS LOGIC Low Power, high quality
Stereo DAC, WM8524.

The 3.5mm audio jack (J1200) is a 3.5mm CTIA standard pinout TRRS jack.

The 3.5mm jack provides a line level stereo audio output and is not intended drive low impedance
speakers or headphones. It is intended to drive amplified devices such as powered PC speakers or
sound systems.

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Summary of Contents for Open-X 8M

Page 1: ...ement solely in support of your permitted use of the Open X 8M Development Kit under the Agreement Distribution of this document is strictly prohibited without the express written permission of Intrinsyc Technologies Corporation and its respective licensors which they can withhold condition or delay in its sole discretion Intrinsyc is a trademark of Intrinsyc Technologies Corporation registered in...

Page 2: ... Copyright Intrinsyc Technologies Corporation IDENTIFICATION Document Title Open X 8M Development Kit based on the NXP i MX8 Processor User Guide Document Number ITC 01RND1319 UG 001 Version 1 0 Date May 3 2018 History REVISION DATE DESCRIPTION PAGES 1 0 May 3 2018 Initial release All ...

Page 3: ...9 3 6 System Block Diagram 10 3 7 Open X 8M SOM 11 SOM Mechanical Properties 11 SOM Block Diagram 12 Hardware Specification 13 SOM RF Specification for WIFI BT 14 3 8 Open X 8M Carrier Board 15 Boot dip switch Configuration Options 15 Open X 8M Carrier Board Expansion Connectors 16 Open X 8M Power Specification 18 Power Probe Header J600 19 Debug Serial UART over USB J800 20 JTAG Header J801 21 Mi...

Page 4: ...For more background information on this development kit visit https www intrinsyc com imx embedded development kits open x 8m development kit 1 2 Scope This document will cover the following items on the Open X 8M Block Diagram and Overview Hardware Features Configuration SOM Carrier Board Display Board for LCD Optional 1 3 Intended Audience This document is intended for hardware or software devel...

Page 5: ... Board BT LE Bluetooth Low Energy CSI Camera Serial Interface DSI MIPI Display Serial Interface EEPROM Electrically Erasable Programmable Read only memory eMMC Embedded Multimedia Card FCC US Federal Communications Commission FWVGA Full Wide Video Graphics Array HDMI High Definition Media Interface JTAG Joint Test Action Group MIPI Mobile Industry processor interface RF Radio Frequency SOM System ...

Page 6: ...18 Audio Expansion Headers J1801 J1802 J1803 28 Figure 3 19 QCA6174A Module on SOM 30 Figure 3 20 On Board PCB Antennas 30 Figure 3 21 HDMI connector on Carrier Board J1000 31 Figure 3 22 MIPI Display Connector on Carrier Board J1700 32 Figure 3 23 Gigabit Ethernet RJ45 Jack J1400 34 Figure 3 24 PCIe Connector and Mounting Holes J1100 35 Figure 3 25 USB Select Switch for PCIE 35 Figure 3 26 Camera...

Page 7: ...is development platform is not intended to meet the requirements of a commercially available consumer device including those requirements specified in the European Union directives applicable for radio devices being placed on the market FCC equipment authorization rules or other regulations pertaining to consumer devices being placed on the market for use by the general public This development pla...

Page 8: ...8M processor o Open X 8M Development Board Mini ITX form factor o Heatsink covering the SOM not shown below o Open Q LCD touchpanel Optional Accessory o AC power adapter and HDMI cable Figure 3 1 Assembled Open X 8M Development Kit The development kit comes with Android software pre programmed on the CPU board SOM Please contact Intrinsyc for availability of camera modules sensor boards and other ...

Page 9: ... conveyed on these two boards SOM Serial Number Wi Fi MAC address Ethernet MAC address Refer to http support intrinsyc com account serialnumber for more details about locating the serial number as this will be needed to register the development kit To register a development kit please visit http support intrinsyc com account register Carrier board Serial Number Note Please retain the SOM and carri...

Page 10: ...pen X 8M Block Diagram NXP iMX8MQ PMIC NXP PF4210 3 3V Buck USB Mux USB HS USB HS USB SS USB 3 0 Type C OTG USB 3 0 Type A HOST M 2 NGFF Key E USB HS PCIe UART SDIO PCM USB SS DC Jack CP2105 USB HS UART3 UART4 USB 2 0 uB Debug USB VBUS Audio Expansion CSI 4L CSI 4L 4 bit SDIO HDMI WM8524 CODEC SAI i MX 8M SOM COAX COAX 3x SAI NAND SPDIF I2C UART PCM PCIe LPDDR4 3GB MT53B768M32D4NQ 062 WT B eMMC 16...

Page 11: ...ontains the following i MX 8M MiMX8MQ6DVAJZAB main application processor LPDDR4 1600MHz 3GB RAM 16 GB eMMC Flash storage MC34PF4210A1ES PMIC for Peripheral LDOs Boost Regulators QCA6174A 1 Wi Fi BT pre certified module over PCIe UART PCM Figure 3 3 Open X 8M SOM SOM Mechanical Properties Area 19 25 cm2 55 mm x 35 mm Interface 3x 100 pins SOM to carrier board connector B2B Connector Thermal An opti...

Page 12: ...PDDR4 200b Micron 768 Meg x32 Part MT53B768M32D4NQ 062 WT B x32 DRAM eMMC 5 0 16GB Part MTFC16GAKAECN 2M WT x8 SDIO PMIC NXP PMIC PF4210 Part MC32PF4210A1ES POWER WiFi BT FOXCONN MODULE Part U69H025 22 PCIe UART PCM 100 pin B2B header x3 Part DF40C 100DP 0 4V JTAG x2 Debug UART A53 M4 SD3 0 SDIO GPIO PWM HDMI 2 0a HDMI RGMII USB USB OTG x2 CSI 4L x2 MIPI CSI x2 DSI 4L x1 MIPI DSI x1 SAI1 TX 8 Ch S...

Page 13: ...LPDDR4 Supported via 1x32bit DRAM channel 16 GB eMMC Primary Storage for platform Mainly used for storing SW applications and user data etc eMMC 5 0 Connectivity Wi Fi 2 4 GHz 5GHz via QCA6174A 1 PCIe QCA6174A 1 Wi Fi BT Combo Chip 802 11a b g n ac 20 40 MHz at 2 4 GHz 20 40 80 MHz at 5 0 GHz via QCA6174A 1 over PCIe1 Full 2x2 antenna configuration BT V4 1 2 4 GHz via QCA6174A 1 UART PCM QCA6174A ...

Page 14: ...FI BT The SOM includes the following radio interfaces from a single QCA6174A 1 module o ANT1 Wi Fi antenna 1 BT o ANT2 Wi Fi antenna 2 Antenna 1 The antenna 1 connector is for one of the two Wi Fi antennas as well as the single Bluetooth antenna Antenna 2 The antenna 2 connector is for the second Wi Fi antenna By default both antenna ports are connected by coaxial cables to the PCB trace antennas ...

Page 15: ... SOM 3x100 pin board to board connector Display 100 pin carrier board connector Boot dip switch Configuration Options Two dip switches on the Open X 8M carrier board provides the user options to configure the boot mode and boot device The table below show the supported boot modes on the Open X 8M Development Kit S701 BOOT_MODE 1 BOOT_MODE 0 BOOT SOURCE 0 0 Fuses 0 1 Serial Downloader 1 0 Internal ...

Page 16: ...ding 24bit 192kHz stereo line level audio High quality stereo audio support Audio Expansion FPC connector for SAI lines Supports SAI1 SAI3 SAI5 SPDIF as well as I2C3 and NAND FPC connector for audio expansion boards 3 x 0 05mm pitch headers for SAI lines Supports SAI1 SAI3 SAI5 SPDIF as well as I2C3 and NAND 0 05mm headers for audio and GPIO expansion RJ45 Gigabit Ethernet Connector RJ45 jack with...

Page 17: ... MIPI Alliance Specification v1 00 for Camera Serial Interface For connecting camera accessories Power Probe Header 3 pin power probe header Sense lines connected across 0 005 Ohm resistor To measure current consumption of SOM The following sections will provide in depth information on each expansion header and connectors on the carrier board The information listed below is of particular use for t...

Page 18: ...38V via a Richtek step down converter U400 on the carrier board The 3 38V is then fed directly to the SOM PMIC To ensure the SOM is getting powered correctly a user can monitor the current going into the SOM via the power probe header J600 see section 3 8 4 Note that even though the hardware design supports powering the development kit solely from the USB Type C jack the software may not support t...

Page 19: ...positive current sense line SOM_PWR_SENSE_P J600 1 SOM power negative current sense line SOM_PWR_SENSE_N J600 2 GND GND J600 3 To obtain power consumption measurements the Power Probe Header J600 can be connected to a data acquisition unit such as a Keithley 2701 and the voltages on the SOM_PWR_SENSE_P N pins should be captured every few seconds over a test period typically 30 minutes The SOM powe...

Page 20: ... board UART1_TXD and UART1_RXD are used to output serial debugging information for A53 core UART2_TXD and UART2_RXD are used to output serial debugging information for M4 core No RTS or CTS signals are sent from the Processor to the Debug connector as these signals are typically ignored by most applications To get the serial terminal working with a PC user needs to ensure that the appropriate SILI...

Page 21: ...pins A sixth pin on the processor accepts a board HW configuration input specific to the Open X 8M board Note Intrinsyc does not provide software support for JTAG Table 3 8 6 1 JTAG Header Pinout J801 Description Signal Pin NO Pin NO Signal Description TMS Signal TMS J801 2 J801 1 JTAG_PWR 3V3 JTAG Power detect TCK Signal TCK J801 4 J801 3 GND Ground TDO Signal Target Data Out TDO J801 6 J801 5 GN...

Page 22: ...D Card Socket J900 The carrier board has one 4 bit MicroSD card slot on the bottom side which is connected to the SOM via SD2 interface Figure 3 12 SD Card on Carrier Board J900 The SD2 interface is designed to support SD SDIO standard up to version 3 0 1 8 V and 3 3 V operation but do not support 1 2 V operation 4 bit SD and SDIO modes ...

Page 23: ...a software See NXP i MX8 reference manual IMX8MDQLQRM In the ON state holding the RST button S2001 will force all power rails to go low except the VDD_SNVS_3V3 on the Open X 8M carrier board The i MX 8MDQLQ applications processor will be immediately turned off and reinitiate a boot cycle from the OFF state when the RST button is released There are two status LEDs and two user LEDs on the carrier b...

Page 24: ...poration USB Type C J1300 and Type A J1301 The i MX 8MDQLQ Applications Processors contains two USB 2 0 3 0 OTG controllers with two integrated USB PHYs On the Open X 8M development kit one is used for the USB Type A host port and the other for the USB Type C port Figure 3 14 USB Type C J1300 Figure 3 15 USB Type A J1301 ...

Page 25: ...t Jack J1200 The main Audio DAC used on the Open X 8M board is the CIRRUS LOGIC Low Power high quality Stereo DAC WM8524 The 3 5mm audio jack J1200 is a 3 5mm CTIA standard pinout TRRS jack The 3 5mm jack provides a line level stereo audio output and is not intended drive low impedance speakers or headphones It is intended to drive amplified devices such as powered PC speakers or sound systems ...

Page 26: ...Expansion Header Pinout J1800 Description Signal Pin NO 3V3 or VSYS Voltage V_AUD J1800 1 3V3 or VSYS Voltage V_AUD J1800 2 3V3 or VSYS Voltage V_AUD J1800 3 SAI Master Clock SAI1_MCLK J1800 4 GND J1800 5 SAI1 TX Clock SAI1_TXC J1800 6 GND J1800 7 SAI1 TX Frame Sync SAI1_TXFS J1800 8 SAI1 TX Data 0 SAI1_TXD0 J1800 9 SAI1 TX Data 1 SAI1_TXD1 J1800 10 SAI1 TX Data 2 SAI1_TXD2 J1800 11 SAI1 TX Data 3...

Page 27: ...J1800 33 SAI5 RX Data 0 SAI5_RXD0 J1800 34 SAI5 RX Data 1 SAI5_RXD1 J1800 35 SAI5 RX Data 2 SAI5_RXD2 J1800 36 SAI5 RX Data 3 SAI5_RXD3 J1800 37 GND J1800 38 SAI3 Master Clock SAI3_MCLK J1800 39 GND J1800 40 SAI3 RX Clock SAI3_RXC J1800 41 GND J1800 42 SAI3 RX Frame Sync SAI3_RXFS J1800 43 SAI3 RX Data 0 SAI3_RXD J1800 44 GND J1800 45 SPDIF External Lcock or 3V3 SPDIF_EXT_CLK 3V3 J1800 46 SPDIF TX...

Page 28: ...8 11 2 Audio Outputs Expansion Headers J1801 J1802 J1803 Figure 3 18 Audio Expansion Headers J1801 J1802 J1803 These 0 05mm pitch headers provide all of the same signals that are available on the 60 pin FPC connector and are provided to make it easier for users to connect to individual signals if desired 1 3 SAI 2 SPDIF 3 I2C 4 NAND ...

Page 29: ...1 17 J1801 18 SAI1_TXD5 GND J1801 19 J1801 20 GND J1802 Signal Pin NO Pin NO Signal V_AUD J1802 1 J1802 2 GND SAI1_MCLK J1802 3 J1802 4 SPDIF_EXT_CLK SAI1_RXD6 J1802 5 J1802 6 SAI5_RXC SAI1_RXD7 J1802 7 J1802 8 SAI5_RXFS SPDIF_TX J1802 9 J1802 10 GND SPDIF_TX J1802 11 J1802 12 SAI1_RXD3 SAI1_TXD7 J1802 13 J1802 14 SAI1_RXD2 SAI1_TXD6 J1802 15 J1802 16 SAI1_RXD1 SAI1_TXD4 J1802 17 J1802 18 SAI1_RXD...

Page 30: ...nect to the QCA6174A WiFi module on the SOM via coaxial cables that attach to MH4L receptacles The Open X 8M Development Kit comes complete with the two coaxial cables installed The antennas connect to the SOM in the following configuration o WLAN BT ANT 1 on the carrier board connects to ANT1 on the WiFi module o WLAN BT ANT 2 on the carrier board connects to ANT2 on the WiFi module Figure 3 19 Q...

Page 31: ...upport the following display combinations MIPI DSI 1 x 4lane DSI Display 1080 x 1024 at 60Hz HDMI HDMI 2 0a supporting one display resolution up to 4096 x 2160 at 60 Hz 20 Audio interfaces 32 bit 384 kHz fs with Time Division Multiplexing TDM 3 8 13 1 HDMI Connector J1000 The on board HDMI Type A connector enables the Open X development platform to connect to an external HDMI monitor or television...

Page 32: ...to connect to a MIPI DSI display panel or other device Figure 3 22 MIPI Display Connector on Carrier Board J1700 The display connector provides the following interfaces DSI 1 x 4 lane MIPI DSI interface 5V 12V 1 8V and 3 0V voltage rails Touch Panel Support supports I2C touch controllers Additional GPIOs for general purposes available Note Please refer to the carrier board schematic and Display Bo...

Page 33: ...IPI_DSI_LANE0_P DSI Data Lane 0 49 MIPI_DSI_RESETn 52 MIPI_DSI_LANE1_N DSI Data Lane 1 54 MIPI_DSI_LANE1_P DSI Data Lane 1 55 VDDIO_TP_1V8 58 MIPI_DSI_CLK_N DSI Clock Lane 60 MIPI_DSI_CLK_P DSI Clock Lane 61 DISP_3V0 64 MIPI_DSI_LANE2_N DSI Data Lane 2 66 MIPI_DSI_LANE2_P DSI Data Lane 2 70 MIPI_DSI_LANE3_N DSI Data Lane 3 72 MIPI_DSI_LANE3_P DSI Data Lane 3 89 DC_IN_12V 91 93 95 DCDC_5V 2 8 14 20...

Page 34: ...eive the ENET signals The Ethernet PHY of the Open X 8M carrier board is provided by the Qualcomm AR8031 Ethernet transceiver chip U1400 which interfaces to the i MX 8M processor via standard RGMII Ethernet signals The processor takes care of all Ethernet protocols at the MAC layer and above The PHY is only responsible for the Link Layer formatting The PHY receives the clock signal from the ENET_T...

Page 35: ...ed Card sizes are 2230 2245 2260 and 2280 Mounting holes are labelled on the top side of the PCB In addition to being able to establish external connectivity the connector provides access to the PCIE2 interface which is routed from the SOM Bottom Top Figure 3 24 PCIe Connector and Mounting Holes J1100 The connector makes the following interfaces available SD2 I2C PCM UART PCIE2 and USB2 The USB2 c...

Page 36: ...00 J1500 Table 3 8 16 1 below outlines the pinouts of these connectors Table 3 8 16 1 MIPI CSI Camera Connector Pinouts J1500 J1600 Pin CAM1 J1500 CAM2 J1600 Description 1 NVCC_3V3 NVCC_3V3 Power output Connected to main 3 3V 2 NVCC_3V3 NVCC_3V3 Power output Connected to main 3 3V 3 NVCC_3V3 NVCC_3V3 Power output Connected to main 3 3V 4 11 19 22 25 28 31 34 GND GND Ground 5 CAM_2V85 CAM_2V85 Powe...

Page 37: ...o i MX 8M8 gpio1 IO 15 Default use is for camera master clock Maximum 24MHz 20 MIPI_CSI0_LANE0 _N MIPI_CSI1_LANE0_N Input MIPI CSI0 CSI1 CSI2 data lane 0 21 MIPI_CSI0_LANE0 _P MIPI_CSI1_LANE0_P Input MIPI CSI0 CSI1 CSI2 data lane 0 23 MIPI_CSI0_CLK_ N MIPI_CSI1_CLK_N Input MIPI CSI0 CSI1 CSI2 clock lane 24 MIPI_CSI0_CLK_P MIPI_CSI1_CLK_P Input MIPI CSI0 CSI1 CSI2 clock lane 26 MIPI_CSI0_LANE1 _N M...

Page 38: ...Camera of 2 lane One Camera of 1 lane 3 Pin 5V DC Fan Connector The carrier board has one 5V DC fan interface J700 is a standard TX3 style connector part number Molex 0022232031 which gives greater flexibility for fan selection SW700 can be used to shut off the fan when it is not in use The tachometer is not routed back to the SOM and the fan uses a constant 5V DC so speed control is not an option...

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