Intersil ISL8107EVAL2Z, Application Note

Page: 3 / 9

3
AN1459.0
June 9, 2009
FIGURE 9. LINE REGULATION FOR V
OUT
= 12V
12.000
12.010
12.020
12.030
12.040
12.050
12.060
12.070
12.080
12.090
12.100
0 1 2 3 4 5 6
LOAD CURRENT (A)
OUTPUT V
O
L
T
AGE
(V
)
V
IN
= 18V
V
IN
= 24V
V
IN
= 36V V
IN
= 48V
V
IN
= 60V
Application Note 1459