Intersil ISL70219ASEHEV1Z, User Manual

Page: 2 / 10

UG007 Rev.1.0 Page 2 of 8
Jul 1, 2021
ISL70219ASEHEV1Z USER MANUAL
Power Supplies
External power connections are made through the +V, -V, VREF
and Ground connections on the evaluation board. For single
supply operation, the -V and Ground pins are tied together to the
power supply negative terminal. For split supplies, +V and -V
terminals connect to their respective power supply terminals.
Decoupling capacitors C
2
, C
3
, C
4
and C
6
connect to their
respective supplies through R
11
and R
14
resistors. These
resistors are 100 Ω but can be changed by the user to provide
additional power supply filtering, or to reduce the voltage rate of
rise to less than ±1V/µs. Two additional capacitors, C5 and C
7
,
are connected close to the part to filter out high frequency noise.
Anti-reverse diode D
1
protects the circuit in the momentary case
of accidentally reversing the power supplies to the evaluation
board. The VREF pin can be connected to ground to establish a
ground referenced input for split supply operation, or can be
externally set to any reference level for single supply operation.
Amplifier Configuration
A simplified schematic of the evaluation board is shown in
Figure 2 . The input stage with the components supplied is
shown in Figure 4 , with a closed loop gain of 10V/V. The
differential amplifier gain is expressed in Equation 1 :
For single-ended input with an inverting gain G = -10V/V, the
IN+ input is grounded and the signal is supplied to the IN-
input. The VREF can be connected to a reference voltage
between the V+ and V- supply rails. For non-inverting operation
with G = 11V/V, the IN- input is grounded and the signal is
supplied to the IN+ input. The non-inverting gain is strongly
dependent on any resistance from IN- to GND. For good gain
accuracy, a 0
Ω resistor should be installed on the empty R
5
pad. The VREF pin must be connected to ground to establish a
ground referenced input for dual supply operation, or can be
externally set to any reference level for single supply
operation. The VREF should not be left floating.
PCB Layout Considerations
There a few layout constraints to consider when using the
ISL70219ASEH, but this will generally apply to any generic
operational amplifier. Analog circuits can conduct noise
through paths that connect it to the “outside world”. These
paths include the V+, V-, IN+, IN- and OUT terminals. It’s
important to make sure these paths are kept away from
known noise sources to ensure optimal performance of the
part. If the ISL70219ASEH resides on the same boards as
digital circuitry it is necessary to decouple the power pins on
the analog as well as the digital circuitry. This is done on the
evaluation board with C
2
through C
7
, with the lower value
capacitors, C
5
and C
7
, placed near the V- and V+ pins
respectively to minimize high frequency noise.
FIGURE 2. BASIC AMPLIFIER CONFIGURATION
IN-
IN+
RF
VREF
IN-
IN+
GND
100k Ω
RREF+
VOUT
ISL70219 (1/2)
VP
V-
0 Ω
VN
VCM
IN-
IN+
VREF
V+
RIN-
10k Ω
RIN+
10k Ω
100k Ω
RL
DNP
-
+
+
-
-
+
+
-
V
OUT
V
IN+

V
IN-

R
F
 
R
IN
 
– V
REF
+ = (EQ. 1)
0.01µF 0.01µF
R14
R1
1
D1
C2 C4
C5 C7
J7
J10
J8
J9
J5
J6
10
0
10
0
1µF 1µF
VREF
V+ V-
FIGURE 3. POWER SUPPLY CIRCUIT
0.1µF 0.1µF
C3 C6