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User Guide 046

4

UG046.0

August 28, 2015

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When designing for >6A of output current place a Schottky 
clamp diode as close as possible to the LXx and PGNDx pins of 
the IC. A small series R-C snubber connected from the LXx pins to 
the PGNDx pins may be used to damp high-frequency ringing on 
the LXx pins if desired.

LXx Connection

Use a small island of copper to connect the LXx pins of the IC to 
the output inductor on layers 1 and 4. Void the copper on layers 2 
and 3 adjacent to the island to minimize capacitive coupling to 
the power and ground planes. Place most of the island on layer 4 
to minimize the amount of copper that must be voided from the 
ground plane (layer 2).

Keep all other signal traces as short as possible.

High Current Protection Clamp

When using the ISL70003ASEH to output current levels >6A it is 
highly recommended to implement a LX to PGND Schottky diode 
clamp to prevent damage to the lower power FET devices. The 
MBRS320T3G diode is used on the ISL70003ASEHEV1Z 
evaluation platform but is not on this evaluation platform.

Lead Strain Relief

The package leads protrude from the bottom of the package and 
the leads need forming to provide strain relief. On the heatsink 
package R64.C, the lead forming should be made so that the 
bottom of the heatsink and the formed leads are flush. 

Heatsink Mounting Guidelines

The R64.C package has a heatsink mounted on the underside of 
the package. The following JESD-51x series guidelines may be 
used to mount the package:

1. Place a thermal land on the PCB under the heatsink.
2. The land should be approximately the same size as to 1mm 

larger than the 10.16x10.16mm heatsink.

3. Place an array of thermal vias below the thermal land.

- Via array size: ~9x9 = 81 thermal vias. 
- Via diameter:   ~0.3mm drill diameter with plated copper on 

the inside of each via.

- Via pitch: ~1.2mm. 
- Vias should drop to and contact as much metal area as 

feasible to provide the best thermal path.

Heatsink Electrical Potential

The heatsink is connected to pin 50 within the package; thus the 
PCB design and potential applied to pin 50 will therefore define 
the heatsink potential.

Heatsink Mounting Materials

In the case of electrically conductive mounting methods 
(conductive epoxy, solder, etc) the thermal land, vias and 
connected plane(s) below must be the same potential as pin 50.

In the case of electrically nonconductive mounting methods 
(nonconductive epoxy), the heatsink and pin 50 could have 
different electrical potential than the thermal land, vias and 
connected plane(s) below.

Summary of Contents for ISL70003ASEHEV2Z

Page 1: ...ard is configured to run from the nominal 300kHz internal oscillator of the ISL70003ASEH Specifications This board has been configured and optimized for the following operating conditions 12V VIN 3 3V...

Page 2: ...User Guide 046 2 UG046 0 August 28 2015 Submit Document Feedback ISL70003ASEHEV2Z Evaluation Board FIGURE 2 ISL70003ASEH TOP VIEW FIGURE 3 ISL70003ASEH BOTTOM VIEW...

Page 3: ...hold at 8 96A for the Overcurrent Protection OCP trip point See Figure 8 for the relationship between the peak current sensed in the IC and the DC output current Use Equation 3 to determine the resist...

Page 4: ...ed forming to provide strain relief On the heatsink package R64 C the lead forming should be made so that the bottom of the heatsink and the formed leads are flush Heatsink Mounting Guidelines The R64...

Page 5: ...Hz FIGURE 8 PEAK CURRENT TO DC IOUT FIGURE 9 THERMAL IMAGE OF REGULATOR WITH 6A LOAD VIN 12V VOUT 3 3V fSW 300kHz TA 25 C 25 C 55 C 125 C 85 C 60 70 80 90 100 50 EFFICIENCY LOAD CURRENT A 0 1 2 3 4 5...

Page 6: ...K RT1 R2 51 1K TPB2 C2 12PF 0 1UF CC8 25K R1 100K PORR1 CC4 0 1UF TP2 0 010UF CPOR TP1 5 49K R4 TP4 7 15K PORR2 TP3 R5 49 9 0 47UF C4 TP5 CSS 0 1UF C5 0 47UF 0 22UF CREF C6 0 47UF D2 RD2 1K 2N7002 7 F...

Page 7: ...TDK C1 1 ea CAP SMD 0603 2700pF 50V 10 X7R ROHS ECJ 1VB1H272K PANASONIC C7 C8 2 ea CAP SMD 0603 6800pF 16V 10 X7R ROHS C0603X7R160 682KNE VENKEL C9 0 ea CAP SMD 0603 DNP PLACE HOLDER ROHS C4 C5 C6 3 e...

Page 8: ...1 10W 1 TF ROHS RC0603FR 073KL YAGEO R3 1 ea RES SMD 0603 357 1 10W 1 TF ROHS ERJ 3EKF3570V PANASONIC R5 1 ea RES SMD 0603 49 9 1 10W 1 TF ROHS CR0603 10W 49R9FT VENKEL R2 1 ea RES SMD 0603 51 1k 1 10...

Page 9: ...User Guide 046 9 UG046 0 August 28 2015 Submit Document Feedback Board Layout FIGURE 11 TOP SILKSCREEN LAYER FIGURE 12 TOP COMPONENT PLACEMENT LAYER...

Page 10: ...User Guide 046 10 UG046 0 August 28 2015 Submit Document Feedback FIGURE 13 LAYER 2 FIGURE 14 LAYER 3 Board Layout Continued...

Page 11: ...ecifications at any time without notice Accordingly the reader is cautioned to verify that the document is current before proceeding For information regarding Intersil Corporation and its products see...

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