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3

Transient Load Generator

Probably one of the most interesting tests for a regulator
system is the transient load. From this single test one can
access voltage droop, loop stability and the regulator’s
response to load changes going from no load to full load and
the recovery after rapid load removal. To quickly determine
these characteristics, a pulse load generator is incorporated
on the evaluation board. A current load pulse at about 20A
per position at 1.5V output is activated with two slide
switches. A scope probe connector is provided to monitor the
current pulse and is calibrated to read 10mV/A. Figures 5, 6,
and 7 show the transient response of the Evaluation Board
with 12V input, operating with the internal load generator
which provides slightly over a 40A load step. For all scope
shots: Top trace is PWM 1 output, next is V

COMP

 at 1V/div.

Center trace is V

CORE

at 50mV/div and the lower trace is the

load current at 20A/div. DAC set to 1.500V.

Efficiency

Figures 8 and 9 show the efficiency of the converter with
CORE voltage at the two extremes of the DAC voltage and at
1.500V, near the middle of the range. The curves show 12V
input and 5V input. Note the improvement in efficiency as the
output voltage approaches the input voltage, with increasing
duty cycle.

Snubber Networks

Snubbers are not used in this design, but pad locations and
connections to PHASE and ground are provided by R2 - C7
for PHASE 1 and R4 - C9 for PHASE 2.

PC Board Schematic

Figure 11 shows the main schematic. The Power Good
indicator circuit is shown in figure 13. Figure 12 shows the
schematic of the transient load generator.

The layout is shown in Figures 14 and 15, starting with the
silk screen in Figure 14. The Bill of Material is shown in Table 1.
Following the Bill of Materials is quick design guide.

PC Board Layout Considerations

Like all high current supplies where low voltage control
signals in the millivolt range must live with high voltage, high
current switching signals, PC board layout becomes crucial
in obtaining a satisfactory supply.

FIGURE 7. EXPANDED BACK EDGE OF CURRENT PULSE

FIGURE 5. 44A TRANSIENT CURRENT PULSE

FIGURE 6. EXPANDED FRONT EDGE OF CURRENT PULSE

0

5

10

15

20

25

30

35

40

LOAD CURRENT (A)

100

90

80

70

60

50

EFFICIENCY (%)

V

OUT

 = 1.10V

V

OUT

 = 1.50V

V

OUT

 = 1.85V

V

IN

 = 12V

FIGURE 8. 12V INPUT EFFICIENCY AT DAC EXTREMES

LOAD CURRENT (A)

100

90

80

70

60

50

0

5

10

15

20

25

30

35

40

EFFICIENCY (%)

V

OUT

 = 1.85V

V

OUT

 = 1.10V

V

OUT

 = 1.50V

V

IN

 = 5V

FIGURE 9. 5V INPUT EFFICIENCY AT DAC EXTREMES

ISL6560/62 Evaluation Board

Summary of Contents for ISL6560

Page 1: ...robe connectors monitor the current pulse and output voltage Extra output capacitor locations are available to modify the output capacitor configuration or type of capacitors 22 F ceramic capacitors a...

Page 2: ...o disable the converter the COMP terminal may be pulled to ground with a NPN transistor N Channel MOS transistor or a switch This device should be located next the COMP pin to reduce the possibility o...

Page 3: ...input Note the improvement in efficiency as the output voltage approaches the input voltage with increasing duty cycle Snubber Networks Snubbers are not used in this design but pad locations and conne...

Page 4: ...f Figure 10 The ground con nection pin 9 of the ISL6560 should be connected to the system ground at the load 2 The two voltage sampling lines described in item 1 above should also be routed away from...

Page 5: ...C41 42 R6 R13 R14 C20 R7 C40 C10 C11 R11 R12 R27 C12 C13 C14 C1 C2 C3 C4 L1 L2 L3 1 H C21 C24 28 C19 C30 C34 37 C60 63 C45 49 C39 12V Q1 HUF76139 Q3 HUF76139 Q2 HUF76145 Q4 HUF76145 20 19 18 17 16 14...

Page 6: ...Evaluation Board LED 1 LED 1A GREEN RED R9 120k R8 3 3k R10 3 3k 12V To PWRGD Pin 10 FIGURE 13 SCHEMATIC DIAGRAM OF THE POWER GOOD MONITORING CIRCUIT Q5 2N7002 2N7002 Q6 FIGURE 14 SILK SCREEN CAll 1 8...

Page 7: ...7 ISL6560 62 Evaluation Board FIGURE 15A TOP COPPER FIGURE 15B GROUND PLAN FIGURE 15C POWER PLAN FIGURE 15D BOTTOM COPPER FIGURES 15A D Showing ALL FOUR LAYERS OF THE PC BOARD...

Page 8: ...OS CON 4SP1500M 6 C22 C23 C38 C31 C32 C33 Not Populated 10x20 5 C40 C41 C42 C43 C52 4 7uF 16V Y5V Ceramic P1206 Various 1 C44 10uF 10 6 3V X5R Ceramic P1206 Various 1 C64 Not Populated P1206 2 D1 D2...

Page 9: ...5 Not Populated P2512 2 R22 R24 50m 1 P2512 Vishay WSL2512 0 05 1 1 R23 33 2 1 P0603 Various 1 R27 4 3K 5 P0805 Various 2 R28 R29 10K 5 P0603 Various 2 R30 R31 100 1 P0603 Various 1 SW1 SW DIP 5 DIPSW...

Page 10: ...CURRENT MULTIPLIER FIGURE B CURRENT MULTIPLIER vs DUTY CYCLE Use the curve of Figure B D VOUT VIN 1 8V 12V 0 15 The multiplier from Figure B is 0 24 IRMS 0 24 40A 9 6A Pensioned 470 F 16V Rubdown ZA s...

Page 11: ...r any patent or patent rights of Intersil or its subsidiaries For information regarding Intersil Corporation and its products see www intersil com ISL6560 62 Evaluation Board L gm Amplifier Output Loa...

Page 12: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information Intersil ISL6560EVAL1 ISL6562EVAL1...

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