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generate 1-4 narrowband carriers or 1-2 wideband carriers.
Consult the ISL5217 documentation for detailed information
on using the ISL5217 evaluation board.
To connect the two boards together, J4 on the ISL5217eval
(DUC) is connected to J1 on the ISL5x61eval (DAC) via a
2x20 pin ribbon cable. The DAC board is configured as is
stocked, except R16 is not populated. See Figure 2 for a
block diagram of the two boards connected.
If a clock source is available that has both CLK and CLK, the
clocking of the two boards is simplified. CLK should connect
to the DUC evaluation board at J11, with a T-connector that
has a 50
Ω
terminator attached. CLK should go to the DAC
evaluation board at J2 and also use a T-connector with a
50
Ω
terminator. (Or, 50
Ω
terminators can be populated on
the evaluation boards. See the board schematics for more
information on doing this.)
If a generator with CLK and CLK is not available, a single
clock source can be used. Connect a T-connector to J2 of
the DAC board and another to J11 of the DUC board.
Connect a DC-biased clock signal to the connector at J2,
then connect J2 and J11 together with a short cable.
Connect a 50
Ω
terminator to the other side of the
T-connector at J11 on the DUC board. Sometimes the length
of the clock cable running from the DAC board to the DUC
board has to be adjusted to achieve adequate setup and
hold times between DATA and CLK.
TO SPECTRUM
50
Ω
SMA
CABLE
ISL5x61
DAC
+3.3V (<0.1A)
FIGURE 2. INTERSIL I ISL5217 SETUP BLOCK DIAGRAM
POWER
SUPPLY
ISL5x61 EVALUATION BOARD
14 BITS
2x20
PI
N
HEADER
ANALYZER
RIBBON CABLE
2x
20 PIN
HEADE
R
ISL5217
4CH DIGITAL
UP CONVERTER
CLOCK (104M MAX)
CLOCK (104M MAX)
ISL5217 EVALUATION BOARD
+5V (<2A)
POWER
SUPPLY
Application Note 9966
