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www.irf.com 

20

RD-0617 

 

 

Thermal Considerations 

The daughter board design can handle one-eighth of the continuous rated power, which 
is generally considered to be a normal operating condition for safety standards. Without 
the addition of a heatsink or forced air-cooling, the daughter board cannot handle 
continuous rated power.  

 

0.0%

10.0%

20.0%

30.0%

40.0%

50.0%

60.0%

70.0%

80.0%

90.0%

100.0%

0

20

40

60

80

100

120

140

160

180

Output Power (W)

Pow

e

S

ta

g

e Effi

ciency (

%

)

 

Figure 16.  Efficiency FV. Output Power, 4  

Ω

 Single Channel Driven, 

±

B supply = 

±

35 V, 1  kHz 

Audio Signal 

         

 

Figure 17.  Thermal image of Daughter Board 

Two-Channel  x 1/8th Rated Power (15 W) in Operation, T

C

 = 54 °C at Steady State 

±

B supply = 

±

35 V, 4  

Ω

 Load, 1 kHz audio signal, T

A

 = 25 °C 

54

°

67

°

Summary of Contents for IRAUDAMP4

Page 1: ...Description 4 Startup and Shutdown 12 Protection 16 Typical Performance 21 Design Documents 27 CAUTION International Rectifier suggests the following guidelines for safe operation and handling of IRAU...

Page 2: ...eping power supplies for ease of use The two channel design is scalable for power and the number of channels Applications AV receivers Home theater systems Mini component stereos Sub woofers Features...

Page 3: ...Notes Conditions THD N 1 W THD N 10 W THD N 60 W 0 005 0 002 0 004 0 002 0 001 0 003 1 kHz Single channel driven Dynamic Range 113 dB 120 dB A weighted AES 17 filter Single channel operation Residual...

Page 4: ...for CH1 CH2 OUT J4 Output for CH2 EXT CLK J8 External clock sync DCP OUT J9 DC protection relay output Power on and Power off Procedure Always apply or remove 35 V bus supplies at the same time Volum...

Page 5: ...3 which filters out the Class D switching carrier signal Figure 2 Simplified Block Diagram of Class D Amplifier Power Supplies The IRAUDAMP4 has all the necessary housekeeping power supplies onboard a...

Page 6: ...nels out of phase so that one channel consumes the energy flow from the other and does not return it to the power supply Bus voltage detection is only done on the B supply as the effect of the bus pum...

Page 7: ...nce of the IRAUDAMP4 depends on a number of different factors The section entitled Typical Performance presents performance measurements based on the overall system including the preamp and output fil...

Page 8: ...illating frequency is determined by the total delay time inside the control loop of the system The delay of the logic circuits the IRS20955 gate driver propagation delay the IRF6645 switching speed th...

Page 9: ...nterference With S3 is set to INT the two settings H and L will modify the internal clock frequency by about 20 kHz to 40 kHz either higher H or lower L The actual internal frequency is set by potenti...

Page 10: ...0 kHz to 350 kHz and then 300 kHz as the output power range where locking is achieved is extended Once locking is lost however the audio performance degrades but the increase in THD seems independent...

Page 11: ...s both the high side and low side MOSFETs are internal to the IRS20955 and the trip levels for both MOSFETs can be set independently In this design the deadtime can be selected for optimized performan...

Page 12: ...5 tolerance can be used Deadtime mode Deadtime R11 R9 DT Voltage DT1 15 ns 10k Open VCC DT2 25 ns 5 6k 4 7k 0 46 VCC DT3 35 ns 8 2k 3 3k 0 29 VCC DT4 45 ns Open 10k COM Figure 8 Deadtime Settings vs...

Page 13: ...ls have to be sequenced correctly to achieve the required click noise reduction The overall startup sequencing shutdown sequencing and shunt circuit operation are described below Click Noise Reduction...

Page 14: ...g of the voltage of CSD C3 on daughter board for CH1 of the IRS20955 is all that is required for complete sequencing The conceptual startup and shutdown timing diagrams are show in Figure 10 Figure 10...

Page 15: ...At this point normal operation begins The entire process takes less than three seconds Figure 11 Conceptual Shutdown Sequencing of Power Supplies and Audio Section Timing Shutdown sequencing is initia...

Page 16: ...milar manner as described above Once the fault is cleared the system will reset similar sequence as startup Figure 12 Conceptual Click Noise Reduction Sequencing at Trip and Reset CStart CSD External...

Page 17: ...ementation Internal Faults OCP and OTP are considered internal faults These internal faults will only shutdown the particular channel by pulling low the relevant CSD pin The channel will shutdown for...

Page 18: ...t Sensing CH1 High Side Current Sensing The high side MOSFET is protected from an overload condition and will shutdown the switching operation if the load current exceeds a preset trip level High side...

Page 19: ...Once the fault is cleared the green Normal LED will turn on There is no manual reset option Over Voltage Protection OVP OVP will shutdown the amplifier if the bus voltage between GND and B exceeds 40...

Page 20: ...he speakers This abnormal condition is rare and is likely caused when the power amplifier fails and one of the high side or low side IRF6645 DirectFET MOSFETs remain in the ON state DCP is activated i...

Page 21: ...cooling the daughter board cannot handle continuous rated power 0 0 10 0 20 0 30 0 40 0 50 0 60 0 70 0 80 0 90 0 100 0 0 20 40 60 80 100 120 140 160 180 Output Power W Power Stage Efficiency Figure 16...

Page 22: ...l unless otherwise noted Green CH1 4 2 V Output Red CH1 8 2 V Output Figure 18 Frequency Characteristics vs Load Impedance Red CH2 CH1 60 W Self Oscillator 400 kHz Green CH2 CH1 60 W Internal Clock 30...

Page 23: ...vs Frequency Green CH1 ACD B 35 V Volume gain 21 9 V V AUX 25 filter Red CH1 ACD B 35 V Volume gain 21 9 V V 3rd order RC filter Figure 21 Stand alone Class D Power Stage THD N Ratio vs Output Power...

Page 24: ...utput Power Green CH1 ACD B 35 V Volume gain 21 9 V V Blue CH1 ACD B 30 V Volume gain 21 9 V V Red CH1 ACD B 25 V Volume gain 21 9 V V Figure 23 THD N Ratio vs Output Power ACD 0 001 100 0 002 0 01 0...

Page 25: ...Ratio vs Frequency Green CH1 ACD 1 W Output Yellow CH1 ACD 10 W Output Red CH1 ACD 100 W Output Figure 25 THD N Ratio vs Frequency ACD Hz 0 0001 100 0 001 0 01 0 1 1 10 20 20k 50 100 200 500 1k 2k 5k...

Page 26: ...igure 26 Frequency Spectrum ACD Green CH1 ACD No signal Self Oscillator 400 kHz Red CH1 ACD No signal Internal Clock 300 kHz Figure 27 Residual Noise ACD Hz 140 0 120 100 80 60 40 20 d B V 10 20k 20 5...

Page 27: ...Figure 29 Typical OCP Waveforms Showing Load Current and Switch Node Voltage VS Figure 30 Typical OCP Waveforms Showing CSD Trip and Hiccup Load current CSD pin Load current VS pin CSD pin VS pin Loa...

Page 28: ...MBT5551 R125 10K R126 100K B Q109 MMBT5551 R139 47k B SD D105 1N4148 R138 4 7k B B Z106 18V Z107 18V R145 47K R146 47K Q110 MMBT5551 R144 10k D107 1N4148 D106 1N4148 C117 100uF 16V 5V R142 68k 5V R119...

Page 29: ...5 0 1uF 400V R47 10 1W CH2 O C15 33pF U3 74AHC1G04 U4 74AHC1G04 C19 2 2uF 16V C20 2 2uF 16V R27 47R R28 47R C23 0 47uF 630V C24 0 47uF 630V R29 OPEN R30 OPEN C44 OPEN R64 OPEN B 6 B 15 GND 16 B 7 CH1...

Page 30: ...uF 25V R26 10k R24 0R R22 10K C12 47pF C4 10uF 16V R20 47K CH2 O SD PWM 2 R6 8 2k D6 BAV19WDICT ND VSS2 C5 OPEN C6 OPEN C22 47nF R40 100K R37 100K Rp1 100C R34 1K R36 100K Q7 MMBT3904 Q2 MMBT5401 Rp2...

Page 31: ...SMA MURA120 MURA120T3OSCT ND Digikey 24 D101 D102 2 SOD 123 MA2YD2300 MA2YD2300LCT ND Digikey 25 HS1 1 Heat_S6in1 HEAT SINK 294 1086 ND Digikey 26 J1A J1B 2 CON EISA 31 CON EISA31 A26453 ND Digikey 27...

Page 32: ...y 72 U1 U2 2 SO 8 TLC081 296 7264 1 ND Digikey 73 U3 U4 2 SOT25 74AHC1G04 296 1089 1 ND Digikey 74 U7 U8 2 MINI5 XN01215 XN0121500LCT ND Digikey 75 U9 U10 2 SO 8 IRF7341 IRF7341 IR 76 U_1 1 SOIC16 CS3...

Page 33: ...POWER 2011 04 ND Digikey 17 Q1 Q2 2 SOT23 BCE MMBT5401 MMBT5401DICT ND Digikey 18 Q3 Q4 Q5 Q6 4 DirectFET MOSFET6645 IRF6645 IRF6645 IR 19 Q7 Q8 2 SOT23 BCE MMBT3904 MMBT3904 FDICT ND Digikey 20 R1 R2...

Page 34: ...062 in Solder mask LPI solder mask SMOBC on top and bottom layers Plating Open copper solder finish Silkscreen On top and bottom layers Daughter board Material FR4 UL 125 C Layer stack 2 Layers 1 oz...

Page 35: ...www irf com 34 RD 0617 IRAUDAMP4 PCB Layers Motherboard Figure 35 Top Layer and Pads...

Page 36: ...www irf com 35 RD 0617 Figure 36 Top Side Solder Mask and Silkscreen 4 0...

Page 37: ...www irf com 36 RD 0617 Figure 37 Bottom Layer and Pads...

Page 38: ...www irf com 37 RD 0617 Figure 38 Bottom Side Solder Mask and Silkscreen...

Page 39: ...www irf com 38 RD 0617 Daughter Board Figure 39 PCB Layout Top Layer and Pads Figure 40 PCB Layout Top Side Solder Mask and Silkscreen...

Page 40: ...www irf com 39 RD 0617 Figure 41 PCB Layout Bottom Layer and Pads Figure 42 PCB Layout Bottom Side Solder Mask and Silkscreen...

Page 41: ...www irf com 40 RD 0617 IRAUDAMP4 Mechanical Construction Motherboard Figure 43 Top Side of Motherboard Showing Component Locations...

Page 42: ...www irf com 41 RD 0617 Figure 44 Bottom Side of Motherboard Showing Component Locations...

Page 43: ...www irf com 42 RD 0617 Daughter Board Figure 45 Top Side Showing Component Locations Figure 46 Bottom Side Showing Connector Locations 03 28 2007...

Page 44: ...PCB Modify Motherboard PCB to add components change value and P N of some components remove IR logo and update revision name Details of changes 1 Change value of C19 C20 R39 and R40 2 Change P N of Z1...

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