Error Messages and Beep Codes
Dual-Core Intel® Xeon® Processor LV and Intel
®
3100 Chipset
User’s Manual
January 2007
56
Order Number:315879-002
The following tables provide information about the POST codes generated by the BIOS:
•
Table 24
lists the Port 80h POST code ranges
•
Table 25
lists the Port 80h POST sequence
Table 24.
Port 80h POST Code Ranges
Range (Hex)
Category/Subsystem
00 – 0F
Debug codes: Can be used by any PEIM/driver for debug.
10 – 1F
Host Processors: 1F is an unrecoverable processor error.
20 – 2F
Memory/Chipset: 2F is no memory detected or no useful memory detected.
30 – 3F
Recovery: 3F indicated recovery failure.
40 – 4F
Reserved for future use.
50 – 5F
I/O Busses: PCI, USB, ISA, ATA, etc. 5F is an unrecoverable error. Start
with PCI.
60 – 6F
Reserved for future use (for new busses).
70 – 7F
Output Devices: All output consoles. 7F is an unrecoverable error.
80 – 8F
Reserved for future use (new output console codes).
90 – 9F
Input devices: Keyboard/Mouse. 9F is an unrecoverable error.
A0 – AF
Reserved for future use (new input console codes).
B0 – BF
Boot Devices: Includes fixed media and removable media. BF is an
unrecoverable error.
C0 – CF
Reserved for future use.
D0 – DF
Boot device selection.
E0 – FF F0 – FF
FF processor exception. E0 – EE: Miscellaneous codes. EF boot/S3: resume
failure.
Table 25.
Typical Port 80h POST Sequence (Sheet 1 of 2)
POST Code
Description
21
Initializing a chipset component
22
Reading SPD from memory DIMMs
23
Detecting presence of memory DIMMs
25
Configuring memory
28
Testing memory
34
Loading recovery capsule
E4
Entered DXE phase
12
Starting Application processor initialization
13
SMM initialization
50
Enumerating PCI busses
51
Allocating resources to PCI bus
92
Detecting the presence of the keyboard
90
Resetting keyboard
94
Clearing keyboard input buffer
95
Keyboard Self Test EB Calling Video BIOS
58
Resetting USB bus
