Index
SE7500CW2 Server Board Technical Product Specification
CXXIV
Revision 1.40
MCH, 9
MDI, 19
Mean Time Between Failures , 100, CV
Memory, 6, 18, CIII, CIV, CV
Memory banks, 7, 8
Memory capacity, 6, 7
Memory controller, 4, 9, 18, 29
Memory initialization, 30
Memory modules, 29
Memory sizing, 30
Memory subsystem, 29, 31
Memory test, 30, 31
Memory timing, 29
Memory-sizing algorithm , 30
MTBF, 100, CV
Multiple-bit error, 7
N
N844077, 14
NMI, 84, CV
NMI button, 37
Non-maskable Interrupt, CV
Non-volatile RAM, 33
North Bridge, 2, 11, 28
NVRAM, 47
O
Option ROM, 33, 42, 44, 45
Option ROM space, 33
P
P32-A, 2, 10, 13
P64-B, 2, 10, 11, 12
P64-C, 2, 10
P64H2, 12
Page table extensions, 31
Password, 68
PBGA, 17
PCI, 30, 32, 33, 36, 37, 43, 47
PCI slot, 18, 20
PCI-to-LPC bridge, 12
PDC20267, 2, 13, 16
Peak overshoot, 96
PEF, CV
PERR, CV
PIO Mode, 16
Platform Event Trap, CV
PME, 37
POST, 31, 33, 35, 44, 47, 63, 70, CV
Power button, 36, 37, 38
Power Distribution Board, 78, CV
Power management, 12
power management controller, 12, 14
Power Management Interrupt, 37
Power switch, 37
Power-on Self-Test
See
POST, 31, 33, 35, 44, 47, 48, 63, 70, CV
Private Management Bus, CV
Processor, 4, CIV
Processor socket, 4, 80, CIII
Processor specifications, 31
Processor stepping, 31
Promise Technology, 2, 13, 16
PS/2 device, 35
PSON, 94, 95
PWOK, 95
PXE, 38, 39
Q
Quiet Boot, 43
R
Rage XL, 13
Rage* XL, 2
RAID, CV, CVI
RAMDAC, 17
Real Time Clock
See
RTC, CV
Real-Time Clock Alarm, 37
Recovery, 28, 34, 46
Reference Documents, CVII
Registered DIMM, 7
Reset, 68, CIV
Reset button, 37
Ring Indicate, 88, CV
Riser card, 12
RTC, 36, 37, 99, CV
S
S0 state, 36
S1 state, 37
S4 state, 36, 37
S5 state, 36
SAF-TE, CV
SBE, CV
Scan algorithm, 33
SE7500CW2, 29
SE7500CW2SE7500CW2 , CIII, CVII
