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Intel SE7221BA1 Technical Manual Download Page 34

Maps and Interrupts

Intel® Entry Server Board SE7221BA1-E TPS

24

Revision

1.5

DMA Channel Number

Data Width

System Resource

6 16

bits

Open

7 16

bits

Open

4.4 PCI Configuration Space Map

Table 8. PCI Configuration Space Map

Bus
Number (hex)

Device
Number (hex)

Function
Number (hex)

Description

00

00

00

Memory controller of Intel® SE7221BA1-E component

00

01

00

PCI Express* x16 graphics port

00

1C

00

PCI Express* port 1 (PCI Express* x1 bus connector 1)

00

1C

01

PCI Express* port 2 (Gigabit Ethernet controller bridge)

00

1C

02

PCI Express* port 3 (PCI Express* x1 bus connector 2)

(Note 1)

00

1C

03

PCI Express* port 4 (not used)

00

1D

00

USB UHCI controller 1

00

1D

01

USB UHCI controller 2

00

1D

02

USB UHCI controller 3

00

1D

03

USB UHCI controller 4

00 1D 07 EHCI

controller

00 1E 00 PCI

bridge

00 1F 00 PCI

controller

00

1F

01

Parallel ATA IDE controller

00

1F

02

Serial ATA controller

00 1F 03 SMBus

controller

(Note 2)

00

00

Gigabit Ethernet Controller

(Note 2)

00

00

PCI Conventional bus connector 1

(Note 2)

01

00

PCI Conventional bus connector 2

(Note 2)

02

00

PCI Conventional bus connector 3

(Note 2)

03

00

PCI Conventional bus connector 4

(Note 2)

05 00 IEEE-1394a

controller

Notes:

1. Bus number is dynamic and can change based on add-in cards used.

4.5 Interrupts

The interrupts can be routed through either the Programmable Interrupt Controller (PIC) or the
Advanced Programmable Interrupt Controller (APIC) portion of the ICH6-R component. The
APIC is supported in Windows* 2000 and Windows* XP operating systems and supports a total
of 24 interrupts.

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Summary of Contents for SE7221BA1

Page 1: ...Intel Entry Server Board SE7221BA1 E Technical Product Specification Revision 1 5 Apr 10 2005 Enterprise Platforms and Services Division ...

Page 2: ...ications September 30 2004 0 8 Initial Draft Oct 20 2004 0 9 Second Draft Nov 11 2004 0 99 Final Draft Dec 31 2004 1 00 Release Jan 4 2004 1 1 Web links updated Jan 25 2005 1 2 Updated Sep 16 2005 1 3 Updated with supported video resolutions Oct 5 2005 1 4 Update the memory information Apr 10 2006 1 5 Updated release ...

Page 3: ...w to cool Intel s own chassis are designed and tested to meet the intended thermal requirements of these components when the fully integrated system is used together It is the responsibility of the system integrator that chooses not to use Intel developed server building blocks to consult vendor datasheets and operating parameters to determine the amount of airflow required for their specific appl...

Page 4: ...ion 6 3 1 4 Processor Support 6 3 1 5 Interrupts and APIC 7 3 2 Memory Subsystem 7 3 2 1 DIMM Socket Features 7 3 2 2 Supported DIMM Configurations 8 3 2 3 Memory Configurations 8 3 3 Intel 7221 Chipset 12 3 3 1 USB Interface 12 3 3 2 IDE Support 12 3 3 3 Real Time Clock CMOS SRAM and Battery 13 3 4 I O Controller 14 3 4 1 Serial Port 14 3 4 2 Parallel Port 14 3 4 3 Diskette Drive Controller 14 3 ...

Page 5: ...Express Connectors 27 5 1 2 PCI 32 27 5 2 LAN Subsystem 27 5 2 1 Marvell Yukon 88E8050 Gigabit Ethernet Controller 27 5 2 2 Intel 82551QM Integrated 10 100 LAN controller 28 5 2 3 RJ 45 LAN Connector with Integrated LEDs 28 5 2 4 Alert Standard Format ASF Support 29 5 3 Hardware Management Subsystem 30 5 3 1 Hardware Management 30 5 3 2 Hardware Monitoring and Fan Control ASIC 30 6 Connections and...

Page 6: ...eep Codes 44 7 10 1 BIOS Error Messages 44 7 10 2 Port 80h POST Codes 45 7 11 Bus Initialization Checkpoints 49 7 12 Speaker 50 7 13 BIOS Beep Codes 50 8 General Specification 51 8 1 Intel Entry Server Board SE7221BA1 E Power Budget 51 8 1 1 DC Loading 51 9 Platform Management 53 9 1 Platform Management Overview 53 10 Error Reporting 53 10 1 Fault Resilient Booting 53 11 Design and Environmental S...

Page 7: ...57 12 5 Product Certification Markings Board Level 58 13 Miscellaneous Board Information 59 13 1 ATX Baseboard Mechanical Specifications 59 13 2 I O Shield Mechanical Specification 59 13 3 Thermal Considerations 60 13 4 Calculated Mean Time Between Failure MTBF 63 13 5 Environmental 63 13 6 Clearing CMOS 63 13 7 Supported video resolution 64 Glossary I Reference Documents III ...

Page 8: ...etric Mode Configuration with One DIMM 11 Figure 8 Single Channel Asymmetric Mode Configuration with Three DIMMs 11 Figure 9 Thermal Monitoring 15 Figure 10 Detailed System Memory Address Map 22 Figure 11 LAN Connector LED Locations 28 Figure 12 Back Panel Connectors 31 Figure 13 Intel Entry Server Board SE7221BA1 E Component side Connectors 32 Figure 14 SSI Connector 35 Figure 15 Connection Diagr...

Page 9: ...Fan Connector 33 Table 15 Chassis Intrusion Connector 33 Table 16 SCSI Hard Drive Activity LED Connector Optional 33 Table 17 Serial ATA Connectors 33 Table 18 Auxiliary Power Output Connector 34 Table 19 Front Panel SSI Connector 34 Table 20 Main Power Connector 36 Table 21 ATX12V Power Connector 37 Table 22 BIOS Setup Configuration Jumper Settings 38 Table 23 CMOS Clear Jumper Configuration 38 T...

Page 10: ...34 Beep Codes 50 Table 35 DC Power Budget 51 Table 36 Safety Regulations 55 Table 37 EMC Regulations 55 Table 38 Product Certification Markings 58 Table 39 Thermal Considerations for Components 62 Table 40 Calculated Mean Time Between Failure 63 Table 41 Intel Entry Server Board SE7221BA1 E Environmental Specifications 63 ...

Page 11: ...21BA1 E It details the architecture and feature set for all functional sub systems that make up the server board This document is divided into the following main categories Chapter 2 Server Board Overview Chapter 3 Functional Architecture Chapter 4 Technical Reference Chapter 5 Connectors and Jumper Blocks Chapter 6 Overview of BIOS Features Chapter 7 BIOS Setup Program Chapter 8 Error Reporting a...

Page 12: ...Introduction Intel Entry Server Board SE7221BA1 E TPS 2 Revision 1 5 This page intentionally left blank ...

Page 13: ...7221MC GMCH integrated PCI Express x8 Graphics Controller Marvell Yukon 88E8050 PCI Express Gigabit Ethernet Controller Intel 82551QM Integrated 10 100 LAN Controller Expansion Capabilities Three PCI Conventional bus add in card connectors SMBus routed to PCI Conventional bus connector 2 Two PCI Express x4 bus add in card connectors with x1 throughput One PCI Express x8 bus add in card connector w...

Page 14: ...erver Board SE7221BA1 E TPS 4 Revision 1 5 Four fan connectors Four fan sense inputs used to monitor fan activity 2 3 Block Diagram The figure below shows a block diagram of the Intel Entry Server Board SE7221BA1 E Figure 1 Block Diagram ...

Page 15: ...el 82551QM LAN controller Q Channel A DIMM 0 Blue Socket CC Front fan connector F Conventional PCI slot 2 R Channel A DIMM 1 Black Socket DD Serial ATA connectors G Conventional PCI slot 1 S Channel B DIMM 0 Blue Socket EE Front panel USB connectors H Marvell Yukon 88E8050 PCI Express Gigabit Ethernet Controller T Channel B DIMM 1 Black Socket FF Serial B connector I PCI Express 1 x8 slot U I O co...

Page 16: ...or The VRD is compliant with the VRM 10 1 specification and provides a maximum of 120A which is capable of supporting the requirements for Intel Pentium 4 and Intel Celeron D processors The board hardware monitors the processor VTTEN Output enable for VTT pin before turning on the VRD If the VTTEN pin of the processors is not identical then the Power ON Logic will not turn on the VRD 3 1 2 Reset C...

Page 17: ...orted 4 GB maximum total system memory Minimum total system memory 128 MB Un buffered ECC DIMMS Serial Presence Detect DDR2 533 MHz 128MB 256MB 512MB and 1GB SDRAM DIMM DDR2 400 MHz 128MB 256MB 512MB and 1GB SDRAM DIMM Check the Intel web site http support intel com support motherboards server se7221ba1 e for the most up to date list of supported memory NOTES Remove any card inserted into the PCI ...

Page 18: ...ules containing two rows of SDRAM and SS refers to single sided memory modules containing one row of SDRAM 3 2 2 Memory Configurations The Intel E7221MC GMCH supports two types of memory organization Dual channel Interleaved mode This mode offers the highest throughput for real world applications Dual channel mode is enabled when the installed memory capacities of both DIMM channels are equal Tech...

Page 19: ...ual Channel Interleaved Mode Configurations 3 2 2 2 Dual Channel Interleaved Mode Configurations The following figure shows a dual channel configuration using two DIMMs In this example the DIMM0 blue sockets of both channels are populated with identical DIMMs OM17123 Channel A DIMM 0 Channel A DIMM 1 Channel B DIMM 0 Channel B DIMM 1 1 GB 1 GB Figure 4 Dual Channel Interleaved Mode Configuration w...

Page 20: ...el B DIMM 0 Channel B DIMM 1 256 MB 512 MB 256 MB Figure 5 Dual Channel Interleaved Mode Configuration with Three DIMMs Figure 6 shows a dual channel configuration using four DIMMs In this example the combined capacity of the two DIMMs in Channel A equal the combined capacity of the two DIMMs in Channel B Also the DIMMs are matched between DIMM0 and DIMM1 of both channels OM17124 Channel A DIMM 0 ...

Page 21: ...nel B is not populated OM17125 Channel A DIMM 0 Channel A DIMM 1 Channel B DIMM 0 Channel B DIMM 1 256 MB Figure 7 Single Channel Asymmetric Mode Configuration with One DIMM Figure 8 shows a single channel configuration using three DIMMs In this example the combined capacity of the two DIMMs in Channel A does not equal the capacity of the single DIMM in the DIMM0 blue socket of Channel B OM17126 C...

Page 22: ...221BA1 E provides five IDE interface connectors One parallel ATA IDE connector which supports two devices Four serial ATA IDE connectors 3 3 2 1 Parallel ATA IDE Interface The ICH6 R s Parallel ATA IDE controller has one bus mastering Parallel ATA IDE interface The Parallel ATA IDE interface supports the following modes Programmed I O PIO processor controls data transfer 8237 style DMA DMA offload...

Page 23: ...oughput RAID 1 supports data mirroring Two physical drives of identical size maintain duplicate sets of all data on separate disk drives Level 1 provides the highest data reliability because two complete copies of all information are maintained RAID 10 combines both striping and mirroring to provide a high data transfer rates and data redundancy Four physical drives of identical size are required ...

Page 24: ...nector located on the back panel and a serial port B header on the board The serial ports support data transfers at speeds up to 115 2 Kbs sec with BIOS support 3 4 2 Parallel Port The 25 pin D Sub parallel port connector is located on the back panel Use the BIOS Setup program to set the parallel port mode 3 4 3 Diskette Drive Controller The I O controller supports one diskette drive Use the BIOS ...

Page 25: ... all three chassis fans that can adjust the fan speed or switch the fans on or off as needed SMBus interface 3 5 2 Thermal Monitoring Figure 9 shows the location of the sensors and fan connections on the Server Board OM16679 B A C E F G D 1 3 1 3 1 4 1 4 Item Description A Remote ambient temperature sensor B Thermal diode located on processor die C Ambient temperature sensor internal to hardware m...

Page 26: ...ware support Power connector Fan connectors LAN wake capabilities Instantly Available PC technology Resume on Ring Wake from USB Wake from PS 2 devices Power Management Event signal PME wake up support PCI Express WAKE signal support 3 6 1 Advanced Configuration and Power Interface ACPI ACPI gives the operating system direct control over the power management and Plug and Play functions of a comput...

Page 27: ...nd knowledge of how devices are being used by applications Devices that are not being used can be turned off The operating system uses information from applications and user settings to put the system as a whole into a low power state The following table lists the power states supported by Intel Entry Server Board SE7221BA1 E along with the associated system power targets See the ACPI Specificatio...

Page 28: ...vice external or internal NOTE The use of Resume on Ring and Wake from USB technologies from an ACPI state requires an operating system that provides full ACPI support 3 6 3 1 Power Connector ATX12V compliant power supplies can turn off the system power through system control When an ACPI enabled system receives the correct command the power supply removes all non standby voltages When resuming fr...

Page 29: ... LAN S1 S4 S5 Note Modem back panel Serial Port A S1 PME signal S1 S4 S5 Note Power switch S1 S4 S5 PS 2 devices S1 RTC alarm S1 S4 S5 USB S1 WAKE S1 S4 S5 Note For LAN and PME signal S5 is disabled by default in the BIOS Setup program Setting this option to Power On will enable a wake up event from LAN in the S5 state NOTE The use of these wake up events from an ACPI state requires an operating s...

Page 30: ...Functional Architecture Intel Entry Server Board SE7221BA1 E TPS 20 Revision 1 5 This page intentionally left blank ...

Page 31: ...12 K 00000 7FFFF 512 KB Conventional memory 4 1 2 Addressable Memory The Intel Entry Server Board SE7221BA1 E utilizes 4 GB of addressable system memory Typically the address space that is allocated for PCI Conventional bus add in cards PCI Express configuration space BIOS firmware hub and chipset overhead resides above the top of DRAM total system memory On a system that has 4 GB of system memory...

Page 32: ...KB 1 MB 960 KB 896 KB 768 KB 640 KB 0 KB 0FFFFFH 0F0000H 0EFFFFH 0E0000H 0DFFFFH 0C0000H 0BFFFFH 0A0000H 09FFFFH 00000H FLASH APIC Reserved 0 MB 640 KB 1 MB Top of usable DRAM memory visible to the operating system PCI Memory Range contains PCI chipsets Direct Media Interface DMI and ICH ranges approximately 750 MB DOS Compatibility Memory DRAM Range OM17140 20 MB 4 GB Top of System Address Space ...

Page 33: ...03F8 03FF 8 bytes COM1 04D0 04D1 2 bytes Edge level triggered PIC LPTn 400 8 bytes ECP port LPTn base address 400h 0CF8 0CFB Note 2 4 bytes PCI Conventional bus configuration address register 0CF9 Note 3 1 byte Reset control register 0CFC 0CFF 4 bytes PCI Conventional bus configuration data register FFA0 FFA7 8 bytes Primary Parallel ATA IDE bus master registers FFA8 FFAF 8 bytes Secondary Paralle...

Page 34: ...roller 2 00 1D 02 USB UHCI controller 3 00 1D 03 USB UHCI controller 4 00 1D 07 EHCI controller 00 1E 00 PCI bridge 00 1F 00 PCI controller 00 1F 01 Parallel ATA IDE controller 00 1F 02 Serial ATA controller 00 1F 03 SMBus controller Note 2 00 00 Gigabit Ethernet Controller Note 2 00 00 PCI Conventional bus connector 1 Note 2 01 00 PCI Conventional bus connector 2 Note 2 02 00 PCI Conventional bus...

Page 35: ...e 2 User available through PIRQF 22 Note 2 User available through PIRQG 23 Note 2 User available through PIRQH Notes 1 Default but can be changed to another IRQ 2 Available in APIC mode only 4 6 PCI Conventional Interrupt Routing Map This section describes interrupt sharing and how the interrupt signals are connected between the PCI Conventional bus connectors and onboard PCI Conventional devices ...

Page 36: ... Table 10 as a reference assume an add in card using INTA is plugged into PCI Conventional bus connector 3 In PCI bus connector 3 INTA is connected to PIRQB which is already connected to the ICH6 R audio controller The add in card in PCI Conventional bus connector 3 now shares an interrupt with the onboard interrupt source Table 10 PCI Interrupt Routing Map ICH6 R PIRQ Signal Name PCI Interrupt So...

Page 37: ... configuration mechanism Automatic discovery link training and initialization Support for Active State Power Management ASPM SMBus 2 0 support Wake signal supporting wake events from ACPI S1 S4 or S5 Software compatible with the PCI Power Management Event PME mechanism defined in the PCI Power Management Specification Rev 1 1 NOTE The Intel Server Board SE7221BA1 E features PCI Express x4 connecto...

Page 38: ...l 82551QM Integrated 10 100 LAN controller The Intel 8255QM Fast Ethernet controller provides the following functions Basic 10 100 Ethernet LAN connectivity IEEE 802 3 10Base T and 100Base TX Compatible PHY IEEE 802 3x 100Base TX Flow Control Support IEEE 802 3u Auto Negotiation support TCP IP UDP checksum offload Full device driver compatibility Wake On LAN technology power management support Wir...

Page 39: ...rt for the onboard 10 100 1000 LAN subsystem PCI Express x1 bus add in LAN cards and PCI Conventional bus add in LAN cards installed in PCI Conventional bus slot 2 Monitoring of system firmware progress events including BIOS present Primary processor initialization Memory initialization Video initialization PCI resource configuration Hard disk initialization User authentication Starting operating ...

Page 40: ...ring and fan control ASIC Thermal and voltage monitoring Chassis intrusion detection 5 3 2 Hardware Monitoring and Fan Control ASIC The features of the hardware monitoring and fan control ASIC include Internal ambient temperature sensor Two remote thermal diode sensors for direct monitoring of processor temperature and ambient temperature sensing Power supply monitoring of five voltages 5 V 12 V 3...

Page 41: ... Do not use these connectors to power devices external to the computer s chassis A fault in the load presented by the external devices could cause damage to the computer the power cable and the external devices themselves This section describes the board s connectors The connectors are divided into two groups Back panel I O connectors Component side I O connectors 6 1 1 Back Panel Connectors Figur...

Page 42: ...en B PS 2 keyboard port Purple C Serial port A Teal D Parallel port Burgundy E PCI Express Graphics F Magic Jack RJ45 USB Marvell Yukon PCI Express Gigabit Ethernet port G Magic Jack RJ45 USB Intel 82551QM Integrated 10 100 LAN port H 6 1 2 Component side Connectors The following figure shows the locations of the component side connectors of the Intel Entry Server Board SE7221BA1 E Figure 13 Intel...

Page 43: ...able 14 Processor Fan Connector and Auxiliary Rear Fan Connector Pin Signal Name 1 Ground 2 12 V 3 FAN_TACH 4 FAN_CONTROL Table 15 Chassis Intrusion Connector Pin Signal Name 1 Intruder 2 Ground Table 16 SCSI Hard Drive Activity LED Connector Optional Pin Signal Name 1 SCSI_ACT 2 No connect Table 17 Serial ATA Connectors Pin Signal Name 1 Ground 2 TXP 3 TXN 4 Ground 5 RXN 6 RXP 7 Ground ...

Page 44: ...Vsb 3 Key 4 Unused 5 Power LED Cathode 6 Unused 7 HDD Act LED Anode 8 Unused 9 HDD Act LED Cathode 10 Unused 11 Power Switch 12 Nic 1 Act LED Anode 13 Power Switch Gnd 14 Nic 1 Act LED Cathode 15 Reset Switch 16 SMBus SDA 17 Reset Gnd 18 SMBus SCL 19 ACPI Sleep Switch 20 Chassis Intrusion 21 ACPI Sleep Switch Gnd 22 Nic 2 Act LED Anode 23 Unused 24 Nic 2 Act LED Cathode 25 Key 26 Key 27 Unused 28 ...

Page 45: ...t Panel USB Connectors Figure 15 is a connection diagram for the front panel USB connectors The 5 V DC power on the USB connector is fused Pins 1 3 5 and 7 comprise one USB port Pins 2 4 6 and 8 comprise one USB port Use only a front panel USB connector that conforms to the USB 2 0 specification for high speed USB devices ...

Page 46: ...es with either 2 x 10 or 2 x 12 main power cables When using a power supply with a 2 x 10 main power cable attach that cable on the right most pins of the main power connector leaving pins 11 12 23 and 24 unconnected ATX12V power a 2 x 2 connector This connector provides power directly to the processor voltage regulator and must always be used Failure to do so will prevent the board from booting T...

Page 47: ...ls are routed to PCI Conventional bus connector 2 This enables PCI Conventional bus add in boards with SMBus support to access sensor data on the Server Board The specific SMBus signals are as follows The SMBus clock line is connected to pin A40 The SMBus data line is connected to pin A41 6 2 Jumper Blocks CAUTION Do not move the jumper with the power on Always turn off the power and unplug the po...

Page 48: ...r booting Configure 2 3 1 3 After the POST runs Setup runs automatically The maintenance menu is displayed Recovery None 1 3 The BIOS attempts to recover the BIOS configuration A recovery diskette is required Table 23 CMOS Clear Jumper Configuration Function Mode Jumper Setting Configuration Normal 1 2 1 3 The BIOS uses current configuration information Clear CMOS 2 3 1 3 During POST the CMOS conf...

Page 49: ...s if the two match The BIOS Setup program can be used to view and change the BIOS settings for the computer The BIOS Setup program is accessed by pressing the F2 key after the Power On Self Test POST memory test begins and before the operating system boot begins The menu bar is shown below Maintenance Main Advanced Security Power Boot Exit NOTE The maintenance menu is displayed only when the serve...

Page 50: ...rns on the system after adding a PCI card the BIOS automatically configures interrupts the I O space and other system resources Any interrupts set to Available in Setup are considered to be available for use by the add in card 7 4 2 PCI IDE Support If you select Auto in the BIOS Setup program the BIOS automatically sets up the PCI IDE connector with independent I O channel support The IDE interfac...

Page 51: ...a non Plug and Play operating system can obtain the SMBIOS information 7 6 Legacy USB Support Legacy USB support enables USB devices to be used even when the operating system s USB drivers are not yet available Legacy USB support is used to access the BIOS Setup program and to install an operating system that supports USB By default Legacy USB support is set to Enabled Legacy USB support operates ...

Page 52: ...ator s Toolkit that is available from Intel can be used to create a custom splash screen 7 8 Boot Options In the BIOS Setup program the user can choose to boot from a diskette drive hard drives CD ROM or the network The default setting is for the diskette drive to be the first boot device the hard drive second and the ATAPI CD ROM third The fourth device is disabled 7 8 1 CD ROM Boot Booting from ...

Page 53: ...t the computer The password prompt will be displayed before the computer is booted If only the supervisor password is set the computer boots without asking for a password If both passwords are set the user can enter either password to boot the computer For enhanced security use different passwords for the supervisor and user passwords Valid password characters are A Z a z and 0 9 Passwords may be ...

Page 54: ...rupted or the battery has failed CMOS Date Time Not Set The time and or date values stored in CMOS are invalid Run Setup to set correct values DMA Error Error during read write test of DMA controller FDC Failure Error occurred trying to access diskette drive controller HDC Failure Error occurred trying to access hard disk controller Checking NVRAM NVRAM is being checked to see if it is valid Updat...

Page 55: ...peration Table 28 Uncompressed INIT Code Checkpoints Code Description of POST Operation D0 NMI is Disabled Onboard KBC RTC enabled if present Init code Checksum verification starting D1 Keyboard controller BAT test CPU ID saved and going to 4 GB flat mode D3 Do necessary chipset initialization start memory refresh and do memory sizing D4 Verify base memory D5 Init code to be copied to segment 0 an...

Page 56: ...54 timer test about to start 19 About to start memory refresh test 1A Memory Refresh line is toggling Going to check 15 µs ON OFF time 23 To read 8042 input port and disable Megakey GreenPC feature Make BIOS code segment writeable 24 To do any setup before Int vector init 25 Interrupt vector initialization to begin To clear password if necessary 27 Any initialization before setting video mode to b...

Page 57: ...on below 1M complete Going to adjust displayed memory size for relocation shadow 51 Memory size display adjusted due to relocation shadow Memory test above 1M to follow 52 Memory testing initialization above 1M complete Going to save memory size information 53 Memory size information is saved CPU registers are saved Going to enter in real mode 54 Shutdown successful CPU in real mode Going to disab...

Page 58: ...inter base address Going to set the RS 232 base address 9B Returned after RS 232 base address Going to do any initialization before Coprocessor test 9C Required initialization before Coprocessor is over Going to initialize the Coprocessor next 9D Coprocessor initialized Going to do any initialization after Coprocessor test 9E Initialization after Coprocessor test is complete Going to check extende...

Page 59: ...om which the control is passed to the different bus routines The high byte of the checkpoint is the indication of which routine is being executed in the different buses Table 32 describes the upper nibble of the high byte and indicates the function that is being executed Table 32 Upper Nibble High Byte Functions Value Description 0 func 0 disable all devices on the bus concerned 1 func 1 static de...

Page 60: ...ually consisting of one long tone followed by a series of short tones For more information on the beep codes issued check the documentation for that external device There are several POST routines that issue a POST terminal error and shut down the system if they fail Before shutting down the system the terminal error handler issues a beep code signifying the test point error writes the error to I ...

Page 61: ...ements The selection of a power supply at the system level is dependent on the system s usage model and not necessarily tied to a particular processor speed Table 35 DC Power Budget Device 3 3 V 5 V 12 V 12 V 5 VSB Server Board 1 2A 2 6A 0 00 0 05A 1 0A Processor 15A Memory DIMMs 6A Fans Processor Fan 1A Front Panel Fan 0 8A Rear Panel Fan 0 8A Aux Fan 0 8A Keyboard Mouse 345mA PCI Slots 3 7 6A 5A...

Page 62: ...General Specification Intel Entry Server Board SE7221BA1 E TPS 52 Revision 1 5 This page intentionally left blank ...

Page 63: ...m Management Revision 1 5 53 9 Platform Management 9 1 Platform Management Overview TBD 10 Error Reporting 10 1 Fault Resilient Booting TBD 11 Design and Environmental Specifications 11 1 Intel Entry Server Board SE7221BA1 E Design Specification TBD ...

Page 64: ...Design and Environmental Specifications Intel Entry Server Board SE7221BA1 E TPS 54 Revision 1 5 This page intentionally left blank ...

Page 65: ... Board SE7221BA1 E complies with when correctly installed in a compatible host system Table 37 EMC Regulations Regulation Title FCC Class B Title 47 of the Code of Federal Regulations Parts 2 and 15 Subpart B Radio Frequency Devices USA ICES 003 Class B Interference Causing Equipment Standard Digital Apparatus Canada EN55022 1998 Class B Limits and methods of measurement of Radio Interference Char...

Page 66: ...the receiver Connect the equipment to a different electrical branch circuit from that to which the receiver is connected Consult the dealer or an experienced radio TV technician for help Any changes or modifications to the equipment not expressly approved by Intel Corporation could void the user s authority to operate the equipment 12 2 2 Canadian Compliance Statement This Class B digital apparatu...

Page 67: ... 336 EEC 73 23 EEC Svenska Denna produkt har tillverkats i enlighet med EG direktiv 89 336 EEC 73 23 EEC 12 4 Product Ecology Statements The following information is provided to address worldwide product ecology concerns and regulations 12 4 1 Disposal Considerations This product contains the following materials that may be regulated upon disposal lead solder on the printed wiring board assembly 1...

Page 68: ...ogo mark for Class B equipment includes Intel name and SE7221BA1 E model designation component side CE mark Declares compliance to European Union EU EMC directive 89 336 EEC and Low Voltage directive 73 23 EEC component side The CE mark should also be on the shipping container Australian Communications Authority ACA C Tick mark Includes adjacent Intel supplier code number N 232 The C tick mark sho...

Page 69: ... in inches millimeters The outer dimensions are 10 20 inches by 9 60 inches 259 08 millimeters by 243 84 millimeters Location of the I O connectors and mounting holes are in compliance with the ATX specification OM16684 6 100 154 94 3 100 78 74 3 750 95 25 6 450 163 83 6 500 165 10 6 200 157 48 5 200 132 08 2 850 72 39 1 800 45 72 0 00 2 600 66 04 4 900 124 46 0 00 Figure 17 Intel Entry Server Boa...

Page 70: ...ield 13 3 Thermal Considerations CAUTION A chassis with a maximum internal ambient temperature of 35 o C at the processor fan inlet is a requirement Use a processor heatsink that provides omni directional airflow as shown in Figure 19 to maintain required airflow across the processor voltage regulator area ...

Page 71: ... adequacy of any thermal or system design remains solely with the integrator Intel makes no warranties or representations that merely following the instructions presented in this document will result in a system with adequate thermal performance CAUTION Ensure that the ambient temperature does not exceed the Server Board s maximum operating temperature Failure to do so could cause components to ex...

Page 72: ...imum case temperatures for the Intel Server Board SE7221BA1 E components that are sensitive to thermal changes The operating temperature current load or operating frequency could affect case temperatures Maximum case temperatures are important when considering proper airflow to cool the SE7221BA1 E Server Board Table 39 Thermal Considerations for Components Component Maximum Case Temperature Intel...

Page 73: ... Server Board SE7221BA1 E Environmental Specifications Parameter Specification Temperature Non Operating 40 C to 70 C Operating 0 C to 55 C Shock Unpackaged 50 g trapezoidal waveform Velocity change of 170 inches second Packaged Half sine 2 millisecond Product Weight pounds Free Fall inches Velocity Change inches sec 20 36 167 21 40 30 152 41 80 24 136 81 100 18 118 Vibration Unpackaged 5 Hz to 20...

Page 74: ...CMOS settings will be restored to default settings Supported video resolution SE7221BA1 E Supported Video Modes Pixel Resolution Refresh Rates 8 bpp 16 bpp 32bpp 640x480 60 75 85 Supported Supported Supported 800x600 60 75 85 Supported Supported Supported 1024x768 60 75 85 Supported Supported Supported 1280x1024 60 75 85 Supported Supported Supported 1600x1200 60 75 85 Supported Supported Supporte...

Page 75: ...mpatible region of battery backed 128 bytes of memory which normally resides on the server board DMA Direct Memory Access ECC Error Correcting Code EMC Electromagnetic Compatibility EPS External Product Specification FDC Floppy Disk Controller FRU Field replaceable unit GB 1024 MB GUID Globally Unique ID HDG Hardware Design Guide IA Intel architecture IP Internet Protocol IRQ Interrupt Request KB ...

Page 76: ... Dynamic RAM SEL System event log SM Server Management SNMP Simple Network Management Protocol SPD Serial Presence Detect SSI Server Standards Infrastructure TBD To be Determined Later TPS Technical Product Specification USB Universal Serial Bus VGA Video Graphic Adapter VRM Voltage Regulator Module Word 16 bit quantity ...

Page 77: ...o the following documents for additional information 14 Board Set Specification Intel Corporation document number xx xxxx 15 System Specification Intel Corporation document number xx xxxx 16 Wired for Management Baseline Specification v 2 0 Intel Corporation http www intel com labs manage wfm wfmspecs htm ...

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