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Intel Confidential
Descriptor Overview
4.4
Intel
®
ME Vendor-Specific Component Capabilities
(Intel
®
ME VSCC) Table
The Intel
®
ME VSCC Table defines how the Intel® ME will communicate with the
installed SPI flash if there is no SFDP table found. This table is defined in the descriptor
and is the responsibility of who puts together the NVM image. VSCCn registers are
defined in memory space and must be set by BIOS. This table must define every flash
part that is intended to be used. The size (number of max entries) of the table is
defined in
4.1.6.1 FLUMAP1—Flash Upper Map 1 (Flash Descriptor Records)
. Each Table
entry is made of two parts: the JEDEC ID and VSCC setting.
4.4.1
How to Set a JEDEC ID Portion of Intel
®
ME VSCC Table
Entry
shows how to obtain the 3 byte JEDEC ID for the target SPI flash.
7.4.1 Adding a New Table Entry
Shows how to set this value in FITC.
If using Flash Image Tool (FIT) refer to System Tools user guide in the Intel
®
ME FW kit
and the respective FW Bring up Guide on how to build the image. If not, refer to
FLUMAP1—Flash Upper Map 1 (Flash Descriptor Records)
thru
Specific Component Capabilities n (Flash Descriptor Records)
.
4.4.2
How to Set a VSCC Entry in
Intel
®
ME VSCC Table for Broadwell PCH-LP Platforms
VSCC0 needs to be programmed in instances where there is only SPI component in the
system. When using an asymmetric flash component (part with two different sets of
attributes based on address) VCSCC0 and VSCC1 will need to be used. This includes if
the system is intended to support both symmetric AND asymmetric SPI flash parts.
ME VSCC Table Settings for Broadwell PCH-LP Family Systems
.
See text below the table for explanation on how to determine Intel Management Engine
VSCC value.
Table 4-4.
Jidn - JEDEC ID Portion of Intel
®
ME VSCC Table
Bits
Description
31:24
Reserved.
23:16
SPI Component Device ID 1: This identifies the second byte of the Device ID of the SPI Flash
Component. This is the third byte returned by the Read JEDEC-ID command (opcode 9Fh).
15:8
SPI Component Device ID 0: This identifies the first byte of the Device ID of the SPI Flash
Component. This is the second byte returned by the Read JEDEC-ID command (opcode 9Fh).
7:0
SPI Component Vendor ID: This identifies the one byte Vendor ID of the SPI Flash Component.
This is the first byte returned by the Read JEDEC-ID command (opcode 9Fh).
Summary of Contents for PCH-LP
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Page 14: ...14 523462 Intel Confidential PCH SPI Flash Architecture...
Page 22: ...22 523462 Intel Confidential PCH SPI Flash Compatibility Requirement...
Page 58: ...58 523462 Intel Confidential Flash Image Tool...
Page 62: ...62 523462 Intel Confidential Flash Programming Tool...
Page 64: ...64 523462 Intel Confidential SPI Flash Programming Procedures...
Page 66: ...66 523462 Intel Confidential Intel ME Disable for Debug Flash Burning Purposes...