Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS VOLUME 3 REV 2.3, Manual

Page: 307 / 1898

Volume 2, Part 1: Addressing and Protection 2:59
Software must issue an instruction serialization operation to ensure writes into the
region registers are observed by dependent instruction fetches and issue a data
serialization operation for dependent memory data references.
4.1.3 Protection Keys
Protection Keys provide a method to restrict permission by tagging each virtual page
with a unique protection domain identifier. The Protection Key Registers (PKR)
represent a register cache of all protection keys required by a process. The operating
system is responsible for management and replacement polices of the protection key
cache. Before a memory access (including IA-32) is permitted, the processor compares
a translation’s key value against all keys contained in the PKRs. If a matching key is not
found, the processor raises a Key Miss fault. If a matching Key is found, access to the
page is qualified by additional read, write and execute protection checks specified by
the matching protection key register. If these checks fail, a Key Permission fault is
raised. Upon receipt of a Key Miss or Key Permission fault, software can implement the
desired security policy for the protection domain.
Figure 4-8 and Table 4-7 describe the
protection key register format and protection key register fields.
ps 7:2 Preferred page Size – Selects the virtual address bits used in hash functions for
set-associative TLBs or the VHPT. Encoded as 2
ps
bytes. The processor may make
significant performance optimizations for the specified preferred page size for the
region.
a
rid 31:8 Region Identifier – During TLB inserts, the region identifier from the select region
register is used to tag translations to a specific address space. During TLB/VHPT
lookups, the region identifier is used to match translations and to distribute hash
indexes among VHPT and TLB sets.
a. For more details on the usage of this field, See “VHPT Hashing” on page 2:65.
Figure 4-8. Protection Key Register Format
63 32 31 8 7 4 3 2 1 0
rv key rv xd rd wd v
32 24 4 1 1 1 1
Table 4-7. Protection Register Fields
Field Bits Description
v 0 Valid – When 1, the Protection Register entry is valid and is checked by the
processor when performing protection checks. When 0, the entry is ignored.
wd 1 Write Disable – When 1, write permission is denied to translations in the protection
domain.
rd 2 Read Disable – When 1, read permission is denied to translations in the protection
domain.
xd 3 Execute Disable – When 1, execute permission is denied to translations in the
protection domain.
key 31:8 Protection Key – uniquely tags translation to a given protection domain.
rv 7:4,63:32 reserved
Table 4-6. Region Register Fields (Continued)
Field Bits Description