Dual-Core Intel
®
Itanium
®
Processor 9000 and 9100 Series Datasheet
15
Electrical Specifications
2
Electrical Specifications
This chapter describes the electrical specifications of the Dual-Core Intel Itanium
Processor 9000 and 9100 series.
2.1
Dual-Core Intel
®
Itanium
®
Processor 9000 and
9100 Series System Bus
Most Dual-Core Intel Itanium processor 9000 and 9100 series signals use the Itanium
processor’s assisted gunning transceiver logic (AGTL+) signaling technology. The
termination voltage, V
CTERM
, is generated on the baseboard and is the system bus high
reference voltage. The buffers that drive most of the system bus signals on the
processor are actively driven to V
CTERM
during a low-to-high transition to improve rise
times and reduce noise. These signals should still be considered open-drain and require
termination to V
CTERM
which provides the high level. The processor system bus is
terminated to V
CTERM
at each end of the bus. There is also support of off-die
termination, in which case, the termination is provided by external resistors connected
to V
CTERM
.
AGTL+ inputs use differential receivers which require a reference signal (V
REF
). V
REF
is
used by the receivers to determine if a signal is a logical 0 or a logical 1. The processor
generates V
REF
on-die, thereby eliminating the need for an off-chip reference voltage
source.
2.1.1
System Bus Power Pins
VCTERM (1.2 V) input pins on the processor provide power to the driver buffers and on-
die termination. The GND pins, in addition to the GND input at the power tab connector,
provide ground to the processor. Power for the processor core is supplied through the
power tab connector by V
Core
, V
Cache,
V
fixed.
The 3.3 V pin is included on the processor
to provide power to the system management bus (SMBus). The V
CTERM
, 3.3 V, and GND
pins must remain electrically separated from each other.
2.1.2
System Bus No Connect
All pins designated as “N/C” or “No Connect” must remain unconnected.
2.2
System Bus Signals
2.2.1
Signal Groups
Table 2-1
shows processor system bus signals that have been combined into groups by
buffer type and whether they are inputs, outputs, or bidirectional, with respect to the
processor.
Summary of Contents for Itanium 9010
Page 14: ...14 Dual Core Intel Itanium Processor 9000 and 9100 Series Datasheet Introduction ...
Page 78: ...78 Dual Core Intel Itanium Processor 9000 and 9100 Series Datasheet Thermal Specifications ...
Page 108: ...108 Dual Core Intel Itanium Processor 9000 and 9100 Series Datasheet Signals Reference ...
