Intel ATX 3.0, Design Manual

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PCI Express* Add-in
Card Considerations
28 336521
The Add-in Card will set this signal to Open (high impedance) whenever its local
power rails that are critical to correct operation are within their operating limits. When
the Add-in Card directly drives this signal low (0 / Ground), any of its local power rails
are outside of their operating limits results in a fault for the Add-in Card. The Add-in
Cards must drive this signal low for at least 100 ms or as long as the input power
stays outside of the voltage specification detailed in Table 3-5 : Auxiliary Power
Connectors Power Supply Rail Requirements - +12V Only in Section 3.2 of this
document. When the voltage returns to within correct operating ranges and the fault
is done, the signal will change to open (high impedance).
Support for this optional sideband signal does not rely on any of the other sideband
signals defined for the 12VHPWR connector and can be implemented independently of
other of these sideband signals.
3.3.3 CARD_CBL_PRES# (Optional)
This sideband signal has two functions:
•
Primary Function:
 This sideband signal provides a signal from the Add-in Card to the PSU that an
Add-in Card has been detected and is correctly attached to the 12VHPWR Auxiliary
Power Connector.
 The primary function is required for all PCIe* Gen 5.0 Add-in Cards.
•
Secondary Function:
 This sideband signal provides communication from the Add-in Card to tell the
PSU when an Add-in Card is present and can be included in the “Power Budgeting
Sense Detect Registers”. This allows the system to correlate which system and
power cables are used with specific PCIe* card slot.
Note that this sideband signal is for the purpose of the system power supply
management support. It is not for the purpose of the Add-in Card to determine the
power limits available to it. Power limits to the Add-in Card are communicated by the
SENSE0/SENSE1 signals.
The CARD_CBL_PRES# signal is tied to a 4.7kΩ pull -down resistor to ground on the
Add-in Cards. This signal is required for all PCIe* Gen 5.0 Add-in Cards, it will
traverse the sideband signals of the 12VHPWR connector. If the PSU monitors the
state of the CARD_CBL_PRES# signal, it must do so with a high impedance 3.3V logic
compatible device input. This signal will be low at the Add-in Cards at all times with
main power is absent. For a PSU to detect the active low presence condition of the
CARD_CBL_PRES# signal a 100kΩ pull -up resistor to 3.3V is required.
When supporting the secondary function, the Add-in Card reads this signal on a high
impedance 3.3V logic compatible input and record the logic high/low state in the
“Power Budgeting Sense Detect” registers. The PSU is allowed to drive this signal high
with a push-pull driver to 3.3V.
Support for this optional sideband signal does not rely on any of the other sideband
signals defined for the 12VHPWR connector and can be implemented independently of
other of these sideband signals.
For a power supply this sideband signal can be used to determine how many PCIe*
Add-in Cards are connected to the power supply. Then the power supply could
determine how much power it can provide to each 12VHPWR connector via the SENSE