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82571EB/82572EI EEPROM
Information Guide

316937-004

Revision 2.3

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Summary of Contents for 82571EB EEPROM

Page 1: ...82571EB 82572EI EEPROM Information Guide 316937 004 Revision 2 3...

Page 2: ...or undefined Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them The 82571EB 82572EI may cont...

Page 3: ...es and bit descriptions for words 03h 0Ah 17h 1Bh 1Eh and 21h Updated Table 1 1 9 Feb 2007 Updated section 1 0 Updated Table 1 words 03h and 04h Updated Word 0Ah bits 13 and 12 Updated Word 10h 20h bi...

Page 4: ...iv 82571EB 82572EI EEPROM Information Guide Note This page is intentionally left blank...

Page 5: ...4h 24h Lower Byte 13 1 7 13 Initialization Control 3 Word 14h 24h Upper Byte 14 1 7 14 Firmware Start Address Including PHY Initialization Area Word 17h 15 1 7 15 PCIe Init Configuration Word 1 Word 1...

Page 6: ...26 1 10 Checksum Word Calculation Word 3Fh 27 1 11 ASF Controller Words 28 1 11 1 ASF Words Content 28 1 11 2 ASF Words EEPROM Checksum CRC 28 1 12 Software Owned EEPROM Words Description 29 1 12 1 EE...

Page 7: ...ion in band PCIe reset a D3 to D0 transition a software commanded EEPROM read CTRL_EXT EE_RST and a software reset CTRL RST word 00000h bit 26 Software Accessed Used by software only These registers a...

Page 8: ...roller to read the EEPROM or access the EEPROM directly using the EEPROM s 4 wire interface Software can use the EEPROM Read register EERD to cause the 82571EB 82572EI to read a word from the EEPROM t...

Page 9: ...er For details on how the CRC is calculated see Section 1 10 Note When the signature is not correct the EEPROM is blank it cannot be accessed by parallel access if its size is 512 bytes or smaller As...

Page 10: ...M can be accessed in a burst mode For example providing an opcode address and then reading or writing data for multiple bytes The hardware inhibits an attempt to access the protected EEPROM locations...

Page 11: ...nit Configuration 2 both 1Ah HW PCIe Init Configuration 3 both 1Bh HW PCIe Control both 1Ch HW LEDCTL 1 3 Default both 1Dh HW Reserved 1Eh FW Device Revision ID both 1Fh FW LEDCTL 0 2 Default both 20h...

Page 12: ...irmware TBL Loadable code both Secured Table 1 82571EB 82572EI EEPROM Map Sheet 3 of 3 Word Used By 15 8 7 0 Image Value Function Word Used By 15 8 7 0 Image Value Function 40h FFh ASF Pass Through BM...

Page 13: ...after being in D3 The Ethernet address is loaded for LAN0 and bit 41 the least significant bit of the last Ethernet address byte and is inverted bit 8 of Word 2 for LAN11 Note A default value of FFFF...

Page 14: ...ride 13 Reserved Reserved Must be set to 1b 12 Reserved Reserved Set to 0b 11 FRCSPD Default setting for the Force Speed bit in the Device Control register CTRL 11 10 FD Default for duplex setting Map...

Page 15: ...PM PME Enable Initial value of the Assert PME On APM Wakeup bit in the Wake Up Control register WUC APMPME 14 Reserved Reserved Set to 0b 13 12 Pause Capability Desired PAUSE capability for advertised...

Page 16: ...s to the SDP0 SDP1 ports respectively for LAN0 LAN1 0b Input 1b Output 14 SDPDIR 2 SDP2 Pin Initial Direction This bit configures the initial hardware value of the SDP2_IODIR bit in the Extended Devic...

Page 17: ...ister CTRL_EXT after power up This relates to the SDP0 SDP1 ports respectively for LAN0 LAN1 5 4 Reserved Reserved Set to 00b 3 Disable 1000 in non D0a When set to 1b disables 1000 Mb s operation in n...

Page 18: ...fy firmware of the change If the manageability subsystem is in a mode where its host interface is active then it should be done by the manageability host command If the host interface is inactive the...

Page 19: ...SR addresses 8800h through 8FFFh The EEPROM contains information for the enabled mode only Additional information on mode operation fail over enable active port etc is available in the manageability C...

Page 20: ...in the Interrupt Pin field of the PCI configuration header for a given port A value of 0b reflected in the Interrupt Pin field indicates that the 82571EB 82572EI uses INTA a value of 1b indicates that...

Page 21: ...abled Expansion ROM BAR enabled 1b 1b Flash and Expansion ROM BARs are disabled Table 11 Firmware Start Address Word 17h Bit Name Description 15 0 Address Defines the word address in the EEPROM of the...

Page 22: ...11b 11 8 Reserved Reserved Set to 0111b 7 0 Reserved Reserved Set to B0h Table 14 PCIe Init Configuration Word 3 Word 1Ah Bit Name Description 15 Reserved Reserved Set to 0b 14 Scram_dis Scrambling Di...

Page 23: ...Description 15 LED3 Blink Initial value of LED3_BLINK field 0b Non blinking 1b Blinking 14 LED3 Inverta Initial value of LED3_IVRT field 0b None inverted active low output 1b Inverted active high outp...

Page 24: ...d maintained 0010b LINK_UP Asserted when any speed link is established and maintained 0011b FILTER_ACTIVITY Asserted when link is established and packets are being transmitted or received that passed...

Page 25: ...ion 0 class code is LAN class code 020000h 10 8 Reserved Reserved Set to 011b 7 0 DEVREVID Device Rev ID The actual device revision ID is the EEPROM value The value is XORed with 05h Always set to 03h...

Page 26: ...This bit is reflected in the FACTPS register 14 Serial Enaa Enables the Serial Port Function in the PCI Configuration Space When this bit is cleared the Serial Port configuration space is not visible...

Page 27: ...value in this field is reflected in the PCI Power Management Data Register of the LAN functions for D0a power consumption and dissipation Data_Select 0 or 4 Power is defined in 100 mW units The power...

Page 28: ...ed Also alternate MAC addresses are ignored by hardware and require specific software support for activation 1 7 27 Manageability D0 Power Consumption Word 100h 40h Note Section 1 7 27 through Section...

Page 29: ...same value is reflected in the Power consumption and Power dissipation 9 5 SerialD3PWR Power Consumption value that is reflected in the Data Register of the Serial Port function in the Power Managemen...

Page 30: ...ble 28 Serial Port Subsystem ID Word 106h 46h Bit Name Description 15 0 SerialSubID Serial Port Subvendor ID Table 29 IPMI KCS Subsystem ID Word 107h 47h Bit Name Description 15 0 SMSSubID IPMI KCS Su...

Page 31: ...r Word 2Fh This word can be used to point to a customer writeable 64 word Vital Product Data VPD block a value of 0000h or FFFFh indicates that this field is not used Table 31 KCS Device Class Code Lo...

Page 32: ...g variable length fields must fit within this space Structure Version 1 Version of this structure Should be set to 1 Reserved 1 Reserved for future use Initiator Name 255 1 iSCSI Initiator Name This f...

Page 33: ...t set Target LUN that initiator is attached to DHCP flag set If DHCP bit is set this field is ignored Target IP 4 DHCP flag not set IP address of iSCSI target DHCP flag set If DHCP bit is set this fie...

Page 34: ...be calculated such that after adding all the words 00h 3Fh including the Checksum word itself the sum should be BABAh The initial value in the 16 bit summing register should be 0000h and the carry bi...

Page 35: ...ese words depends on the ASF Mode functionality 1 11 2 ASF Words EEPROM Checksum CRC While reading the ASF EEPROM words the 82571EB 82572EI computes the ASF CRC word Words 40h F7h are included in the...

Page 36: ...0h LAN 0 1 both 04h SW OEM LED 2 3 Configuration OEM LED 0 1 Configuration 0000h 05h SW EEPROM Major Version EEPROM Minor Version 0000h Both 06h 07h SW OEM Configuration FFFFh 08h 09h SW PBA Byte 1 PB...

Page 37: ...ourse of hardware ECOs the suffix field byte 4 is incremented The purpose of this information is to allow Customer Support or any user to identify the exact revision level of a product Network driver...

Page 38: ...I EEPROM Information Guide 32 Note A default value of FFFFh means the word is not used for any purpose Table 39 PBA Number Words 08h 09h Product PWA Number Byte 1 Byte 2 Byte 3 Byte 4 Example 123456 0...

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