82571EB/82572EI EEPROM Information Guide
20
1.7.22
Functions Control (Word 21h)
Bit
Name
Description
5
LED0 Blink
Mode
Global Blink Mode.
0b = Blink at 200 ms on and 200 ms off.
1b = Blink at 83 ms on with no defined off time.
4
Reserved
Reserved. Set to 0b.
3:0
LED0 Mode
Initial value of the LED0_MODE field specifying what event/state/pattern
is displayed on the LED0 (LINK_UP) output. A value of 0010b (2h)
indicates the LINK_UP state. See
for all available LED modes.
a.
When LED Blink mode is enabled, the appropriate LED Invert bit should be set to 0b.
Table 19. LED 0-2 Configuration Defaults (Word 1Fh) (Sheet 2 of 2)
Table 20. Functions Control (Word 21h)
Bit
Name
Description
15
IDE Ena
Enables the IDE Function in the PCI Configuration Space. When this bit is
cleared, the IDE configuration space is not visible to the system. This bit is
reflected in the FACTPS register.
14
Serial Ena
a
Enables the Serial Port Function in the PCI Configuration Space. When
this bit is cleared, the Serial Port configuration space is not visible to the
system. This bit is reflected in the FACTPS register.
13
IPMI/KCS
Ena
Must be cleared (0b).
12
LAN
Function
Sel
When both LAN ports are enabled and the LAN Function Sel equals 0b,
LAN 0 is routed to PCI Function 0 and LAN 1 is routed to PCI Function 1.
If the LAN Function Sel equals 1b, LAN 0 is routed to PCI Function 1 and
LAN 1 is routed to PCI Function 0. This bit is reflected in the FACTPS[30]
register.
11:10
IDE INT Sel
Default setup of the IDE Interrupt Pin. The value is loaded to the Interrupt
Pin register in the PCI configuration space. Default value in INT D.
00b = INT A.
01b = INT B.
10b = INT C.
11b = INT D.
9:8
Serial INT
Sel
Default setup of the Serial INT Interrupt Pin. The value is loaded to the
Interrupt Pin register in the PCI configuration space. Default value in INT
C.
00b = INT A.
01b = INT B.
10b = INT C.
11b = INT D.