Intel 80C51FA Specification Sheet Download Page 11 | Manualshive

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AUTOMOTIVE 80C51FA/83C51FA

EXTERNAL PROGRAM MEMORY READ CYCLE

270501±12

EXTERNAL DATA MEMORY READ CYCLE

270501±13

EXTERNAL DATA MEMORY WRITE CYCLE

270501±14

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Summary of Contents for 80C51FA

Page 1: ...Power Down Modes Y ONCE On Circuit Emulation Mode Y Available in PLCC and PDIP Packages See Packaging Specification Order 231369 Y Available in 12 MHz and 16 MHz Versions MEMORY ORGANIZATION PROGRAM M...

Page 2: ...AUTOMOTIVE 80C51FA 83C51FA 270501 1 Figure 1 83C51FA Block Diagram 2...

Page 3: ...are guaranteed over the temperature range of 40 C to 85 C ambient For the automo tive temperature range option operational charac teristics are guaranteed over the temperature range of 40 C to 125 C...

Page 4: ...l features of the 83C51FA Port Pin Alternate Function P1 0 T2 External Count Input to Timer Counter 2 P1 1 T2EX Timer Counter 2 Capture Reload Trigger and Direction Control P1 2 ECI External Count Inp...

Page 5: ...ead strobe to external Program Memory When the 83C51FA is executing code from external Program Memory PSEN is activated twice each ma chine cycle except that two PSEN activations are skipped during ea...

Page 6: ...is serviced the next instruction to be executed after RETI will be the one following the instruction that put the device into Power Down DESIGN CONSIDERATION When the Idle mode is terminated by a har...

Page 7: ...is not recommended and ex tended exposure beyond the Operating Conditions may affect device reliability DC CHARACTERISTICS TA e b40 C to a125 C VCC e 5V g10 VSS e 0V Symbol Parameter Min Typ Max Unit...

Page 8: ...pFs the noise pulse on the ALE signal may exceed 0 8V In these cases it may be desirable to qualify ALE with a Schmitt Trigger or use an Address Latch with a Schmitt Trigger Strobe input 2 Capacitive...

Page 9: ...s Frequency 270501 8 TCLCH e TCHCL e 5 ns Figure 7 ICC Test Condition Active Mode All other pins disconnected 270501 9 TCLCH e TCHCL e 5 ns Figure 8 ICC Test Condition Idle Mode All other pins disconn...

Page 10: ...h 127 2TCLCLb40 ns TAVLL Address Valid to ALE Low 43 TCLCLb40 ns TLLAX Address Hold After ALE Low 53 TCLCLb30 ns TLLIV ALE Low to Valid Instruction In 224 4TCLCLb110 ns TLLPL ALE Low to PSEN Low 53 TC...

Page 11: ...AUTOMOTIVE 80C51FA 83C51FA EXTERNAL PROGRAM MEMORY READ CYCLE 270501 12 EXTERNAL DATA MEMORY READ CYCLE 270501 13 EXTERNAL DATA MEMORY WRITE CYCLE 270501 14 11...

Page 12: ...etup to Clock 700 10TCLCLb133 ns Rising Edge TXHQX Output Data Hold after 50 2TCLCLb117 ns Clock Rising Edge TXHDX Input Data Hold After Clock 0 0 ns Rising Edge TXHDV Clock Rising Edge to Input 700 1...

Page 13: ...RST pin is now RESET pin 3 RST pin description is now RESET pin description 4 Figure 6 ICC vs Frequency has been corrected to show test conditions 5 ICC Max spec has been corrected 6 A C Characterist...

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