Intel 6300ESB ICH, Design Manual

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January 2007 91
Intel
®
855GME Chipset and Intel
®
6300ESB ICH Embedded Platform Design Guide
4.4.2 High-Frequency/Mid-Frequency and Bulk Decoupling
Capacitors
System motherboards shall include high and mid-frequency and bulk decoupling capacitors as
close to the socket power and ground pins as possible. Decoupling shall be arranged such that the
lowest ESL devices (0612 reverse geometry type, if used for some of the recommended options
below) are closest to the processor power pins followed by the 1206 devices (if used), and finally
bulk electrolytics (organic covered tantalum or aluminum covered capacitors). System
motherboards shall include bulk-decoupling capacitors as close to the processor socket power and
ground pins as possible. The layout example shown in
Section 4.4.3 shall be followed closely.
Table 21 lists four recommended decoupling solutions for V
CC-CORE
, while Table 22 lists the Intel
Pentium M/Celeron M processor Vccp decoupling recommendations. Table 24 lists the
recommended GMCH decoupling solutions for the V
CCP
and V
CCGMCH
supply rails, respectively.
4.4.3 Processor Core Voltage Plane and Decoupling
Due to the high current requirements of the processor core voltage, the V
CC-CORE
is fed from the
VRM by multiple power planes that provide both low resistance and low inductance paths between
the voltage regulator, decoupling capacitors, and processor V
CC-CORE
pins. To meet the V
CC-CORE
transient tolerance specifications for the worst-case stimulus, the maximum Equivalent Series
Resistance (ESR) of the decoupling solution shall be equal to or less than 3 m
Ω
.
Figure 2 (in Section 3.1 ) depicts an example of a motherboard power plane stack-up that allows for
both robust, high-frequency signal routing and robust V
CC-CORE
power delivery.
The Intel Pentium M/Celeron M processor pin-map is shown in Figure 42 for reference. Note the
highlighted V
CC-CORE
power delivery corridor pins concentrated on the north side of the pin-map
that contains 49 V
CC-CORE
/GND pin pairs while the south side of the socket contains only 24
V
CC-CORE
/GND pin pairs. Because access to the 24 south side pin pairs is blocked by the legacy
signals, the only option available for providing robust core power delivery to the Intel Pentium
M/Celeron M processor is by placing the VRM and most of the decoupling capacitors to the north
of the core power delivery corridor (found on the north side of the 49 V
CC-CORE
/GND pin pairs). It
is not advised to feed the VR from any other side other than this V
CC-CORE
corridor on the north
side of the Intel Pentium M/Celeron M processor socket. Due to the high current demand, all the
V
CC-CORE
and ground vias of the Intel Pentium M/Celeron M processor pin-map shall have vias
that are connected to both internal and external power planes. Sharing of vias between several
V
CC-CORE
pins or ground pins is not allowed.