Datasheet
17
Electrical Specifications
3
Electrical Specifications
3.1
Power and Ground Pins
For clean, on-chip power distribution, the processor has many V
CC
(power) and V
SS
(ground) inputs. All power pins must be connected to V
CC
power planes while all V
SS
pins must be connected to system ground planes. Use of multiple power and ground
planes is recommended to reduce I*R drop. Please refer to the platform design guides
for more details. The processor V
CC
pins must be supplied the voltage determined by
the VID (Voltage ID) pins.
3.2
FSB Clock (BCLK[1:0]) and Processor Clocking
BCLK[1:0] directly controls the FSB interface speed as well as the core frequency of the
processor. As in previous generation processors, the processor core frequency is a
multiple of the BCLK[1:0] frequency.
3.3
Voltage Identification
The processor uses seven voltage identification pins, VID[6:0], to support automatic
selection of power supply voltages. The VID pins for the processor are CMOS outputs
driven by the processor VID circuitry.
specifies the voltage level corresponding
to the state of VID[6:0]. A 1 in this refers to a high-voltage level and a 0 refers to low-
voltage level.
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