6
Gate Logic
AND & NAND Gate Logic:
In AND gate logic, voltage is held HIGH
at the output if all the inputs to the AND gate are held HIGH. If none or
not all inputs to the AND gate are HIGH, the output will be held LOW.
NAND gate logic is the inverse of AND gate logic.
•
If the signal present at
AND Input 1
and
AND Input 2
are both held
HIGH, voltage will pass to the
AND Output
.
•
The signal present at
AND Input 1
normals to
AND Input 2
,
meaning that if there isn’t a cable connected to
AND Input 2
, the
AND gate will still function.
•
An inverted copy of the AND gate is present at the
NAND Output
.
OR & NOR Gate Logic:
In OR gate logic, voltage is held HIGH at the
output if one or both of the inputs to the OR gate are held HIGH. If
neither input is HIGH, the output will be held LOW. NOR gate logic is
the inverse of OR gate logic.
•
If the signal present at either
OR Input 1
or
OR Input 2
is held
HIGH, voltage will pass to the
OR Output
.
•
If using the OR gate only, a signal must be present at
OR Input 1
for
OR Input 2
to function.
•
An inverted copy of the OR gate is present at the
NOR Output
.
•
The
NAND Output
normals to
OR Input 1
.
XOR and XNOR Gate Logic:
In XOR gate logic, voltage is held HIGH at the output if one, and only
one, of the inputs is held HIGH. If both inputs are held LOW or both are
held HIGH, the output will be held LOW. XNOR gate logic is the inverse
of XOR gate logic.
