Innodisk 3MR2-P 128GB User Manual Download Page 31

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2.5” SATA SSD 3MR2-P

Rev 1.0 TPS, Apr., 2017

Command

84h

-Normal Outputs

Table 29: Execute Enable Write Protect command for normal output information

Error

Sector Count

LBA Low

LBA Mid

LBA High

Device

obs

DEV

Status

BSY

DRDY DF

DRQ

ERR

Device register-

DEV

shall specify the selected device.

Status register

BSY

will be cleared to zero indicating command completion

DRDY

will be set to one.

(Device Fault) will be cleared to zero.

DRQ

will be cleared to zero

ERR

will be cleared to zero.

3.12.2 Disable Write Protect Command

This command disable SSD’s write protect feature.

-Protocol: Non Data Command

-Inputs

Table 30: Execute Disable Write Protect command for inputs information

Features

00h

Sector Count

41h

LBA Low

LBA Mid

LBA High

Device

Command

84h

-Normal Outputs

Table 31: Execute Disable Write Protect command for normal output information

Summary of Contents for 3MR2-P 128GB

Page 1: ...3MR2 P Series Customer Customer Part Number Innodisk Part Number Innodisk Model Name Date Innodisk Approver Customer Approver...

Page 2: ...SPECIFICATIONS 10 2 4 1 Temperature Ranges 10 2 4 2 Humidity 10 2 4 3 Shock and Vibration 10 2 4 4 Mean Time between Failures MTBF 10 2 5 CE AND FCC COMPATIBILITY 11 2 6 ROHS COMPLIANCE 11 2 7 RELIAB...

Page 3: ...8 501 25 7 NSA Manual 9 12 26 8 IRIG1006 28 3 11 DESTROY FIRMWARE DESTROY 29 3 12 WRITE PROTECT 30 3 13 HARDWARE BASED AES 256BIT FUNCTION OPTIONAL 32 4 INSTALLATION REQUIREMENTS 35 4 1 2 5 SATA SSD...

Page 4: ...2 5 SATA SSD 3MR2 P 4 Rev 1 0 TPS Apr 2017 REVISION HISTORY Revision Description Date Rev 1 0 First Released April 2017...

Page 5: ...INPUTS INFORMATION 23 TABLE 19 NSA MANUAL 130 2 COMMAND FOR NORMAL OUTPUT INFORMATION 24 TABLE 20 EXECUTE USA ARMY 380 19 COMMAND FOR INPUTS INFORMATION 24 TABLE 21 USA ARMY 380 19 COMMAND FOR NORMAL...

Page 6: ...5 SATA SSD 3MR2 P 6 Rev 1 0 TPS Apr 2017 List of Figures FIGURE 1 INNODISK 2 5 SATA SSD 3MR2 P 7 FIGURE 2 INNODISK FID 2 5 SATA SSD 3MR2 P BLOCK DIAGRAM 15 FIGURE 3 SIGNAL SEGMENT AND POWER SEGMENT 3...

Page 7: ...ATA SSD 3MR2 P is compliant with MIL STD 810G standards The SSD is equipped ruggedized hardware design and thus it can perform well in the harsh environment Furthermore Innodisk 2 5 SATA SSD 3MR2 P su...

Page 8: ...rver computer Innodisk 2 5 SATA SSD 3MR2 P is compliant with Serial ATA Gen 1 Gen 2 and Gen 3 specification Gen 3 supports 1 5Gbps 3 0Gbps 6 0Gbps data rate SATA connector uses a 7 pin signal segment...

Page 9: ...ce Capacity 8GB 1CH 16GB 1CH 16GB 2CH 32GB 2CH 32GB 4CH 64GB 4CH 128GB 4CH 256GB 4CH 512GB 4CH 1TB 4CH Toshiba 15nm Sequential Read max 140 MB s 140 MB s 270 MB s 270 MB s 520 MB s 520 MB s 520 MB s 5...

Page 10: ...Temperature Range Operating Standard Grade 0 C to 70 C Industrial Grade 40 C to 85 C Storage 55 C to 95 C 2 4 2 Humidity Relative Humidity 10 95 non condensing 2 4 3 Shock and Vibration Table 6 Shock...

Page 11: ...ility 2 5 SATA SSD 3MR2 P conforms to CE and FCC requirements 2 6 RoHS Compliance 2 5 SATA SSD 3MR2 P is fully compliant with RoHS directive 2 7 Reliability Parameter Value Read Cycles Unlimited Read...

Page 12: ...Pin Assignment Name Type Description S1 GND NA S2 A Differential Signal Pair A S3 A S4 GND NA S5 B Differential Signal Pair B S6 B S7 GND NA Key and Spacing separate signal and power segments P1 NC NA...

Page 13: ...2 5 SATA SSD 3MR2 P 13 Rev 1 0 TPS Apr 2017 2 10 Mechanical Dimensions DRS25 XXXD81BX1XX DRS25 02TD81BXAXX...

Page 14: ...ration User has to avoid hot plugging the SSD which is configured as boot device and installed operation system Surprise hot plug The insertion of a SATA device into a backplane combine signal and pow...

Page 15: ...n with the host occurs through the host interface using the standard ATA protocol Communication with the flash device s occurs through the flash interface 3 2 SATA III Controller Innodisk 2 5 SATA SSD...

Page 16: ...valid bits whose reliability are not guaranteed The Bad Blocks may be presented while the SSD is shipped or may develop during the life time of the SSD When the Bad Blocks is detected it will be flagg...

Page 17: ...emergency data erase in few seconds by providing ATA command or shorting Quick Erase Pins Pin 1 and Pin 2 with an external jumper to erase all of data block 3 9 1 Quick Erase Command Protocol No Data...

Page 18: ...ase Secure Erase function is designed for emergency data erase to comply with military standard Erase functions can be triggered by shorting Secure Erase Pins Pin 3 and Pin 4 or by sending ATA Command...

Page 19: ...Erase ATA Vendor Command Supported 3 1 Destroy ATA Vendor Command Supported 1 1 Jumper Secure Erase Supported 1 1 Jumper Write Protect Supported 0 1 Jumper Quick Erase Supported 0 X 0 X X X X X 155 S...

Page 20: ...Data Command Inputs Table 10 Execute AFFSI 5020 command for inputs information Register 7 6 5 4 3 2 1 0 Features 22h Sector Count 41h LBA Low Na LBA Mid Na LBA High Na Device 1 1 1 0 Na Command 82h N...

Page 21: ...ed character pattern 0x55 2 The whole disk is erased using Flash Erase Command Protocol Non Data Command Inputs Table 12 Execute DoD 5220 22 M command for inputs information Register 7 6 5 4 3 2 1 0 F...

Page 22: ...5239 26 specification Steps 1 The whole disk is erased using Flash Erase Command 2 The whole disk is filled with random data 3 The whole disk is erased using Flash Erase Command Protocol Non Data Com...

Page 23: ...ed to zero 4 NSA Manual 130 2 This function is compliant with NSA Manual 130 2 specification Steps 1 The whole disk is erased using Flash Erase Command 2 The whole disk is filled with random data 3 Th...

Page 24: ...ing command completion DRDY will be set to one DF Device Fault will be cleared to zero DRQ will be cleared to zero ERR will be cleared to zero 5 USA Army 380 19 This function is compliant with USA Arm...

Page 25: ...ERR Device register DEV shall specify the selected device Status register BSY will be cleared to zero indicating command completion DRDY will be set to one DF Device Fault will be cleared to zero DRQ...

Page 26: ...or Na Sector Count Na LBA Low Na LBA Mid Na LBA High Na Device obs Na obs DEV Na Na Na Na Status BSY DRDY DF Na DRQ Na Na ERR Device register DEV shall specify the selected device Status register BSY...

Page 27: ...a Device 1 1 1 0 Na Command 82h Normal Outputs Table 23 NSA Manual 9 12 command for normal output information Register 7 6 5 4 3 2 1 0 Error Na Sector Count Na LBA Low Na LBA Mid Na LBA High Na Device...

Page 28: ...there is any bit is still 1 the page is re written 0 again This procedure this repeated up to 16 times 7 Erase all bad blocks and checked to determine if any zero are found If any zeros are found era...

Page 29: ...implements an ultimate data erase of the SSD Once Unrecoverable Destroy is triggered beside all the user data and SSD information also SSD firmware will be erased and which is unusable Triggered pin d...

Page 30: ...abled and ATA write command would be aborted which can prevent the disk from data modification or data deletion Write protected data in disk is read only that is users could not write to it edit it ap...

Page 31: ...will be cleared to zero indicating command completion DRDY will be set to one DF Device Fault will be cleared to zero DRQ will be cleared to zero ERR will be cleared to zero 3 12 2 Disable Write Prot...

Page 32: ...ERR will be cleared to zero 3 13 Hardware based AES 256bit function Optional Innodisk 2 5 SATA SSD 3MR2 P is designed with AES engine which is built in the controller When controller receives the dat...

Page 33: ...to meet unique customer requirements with an encrypted key generated by an SSD from the SATA interface host The SSD must keep the encrypted key value when receiving the reset commands This method wor...

Page 34: ...ode allows multiple users with independent access control to read write erase independent data areas LBA ranges Each locking range adjusts by authenticated authority Note that by default there is a si...

Page 35: ...ATA SSD 3MR2 P 35 Rev 1 0 TPS Apr 2017 4 Installation Requirements 4 1 2 5 SATA SSD 3MR2 P Pin Directions Quick Erase Security Erase Optional for WP or FW destroy Figure 3 Signal Segment and Power Seg...

Page 36: ...ctor Please prepare following things Screw driver Four M3 screws SATA single cable 7 pin Maximum length l meter SATA power cable 15 pin Please turn off your computer and open your computer s case Find...

Page 37: ...0 00 00 00 00 Raw Read Error Rate 5 05h LSB MSB 00 00 00 00 00 Reallocated Sector Count 9 09h LSB MSB 00 00 00 Power on Hours 12 0Ch LSB MSB 00 00 00 Power Cycle Count 160 A0h LSB MSB 00 00 00 Uncorre...

Page 38: ...etract Count 194 C2h MSB 00 00 00 00 00 00 Controlled temperature 195 C3h LSB MSB 00 00 00 Hardware ECC recovered 196 C4h LSB MSB 00 00 00 Reallocation event count 198 C6h LSB MSB 00 00 00 Uncorrectab...

Page 39: ...graphic And Security Testing CST Laboratories ECB e d 128 192 256 XTS KS XTS_128 KS XTS_256 6 2 DRBG Algorithm Val No Operational Environment Val Date Modes States Key sizes Description Notes 337 Cade...

Page 40: ...2 5 SATA SSD 3MR2 P 40 Rev 1 0 TPS Apr 2017 Secure Hash Algorithm Validation System SHAVS This testing is performed by NVLAP accredited Cryptographic And Security Testing CST Laboratories SHA 256...

Page 41: ...s Flash for Toshiba 15nm Code 2nd 5th Form Factor Code 14th Operation Temperature RS25 2 5 SATA SSD 3MR2 P C Standard Grade 0 70 Code 7th 9th Capacity W Industrial Grade 40 85 08G 8GB Code 15th Intern...

Page 42: ...2 5 SATA SSD 3MR2 P 42 Rev 1 0 TPS Apr 2017 Appendix...

Page 43: ...2 5 SATA SSD 3MR2 P 43 Rev 1 0 TPS Apr 2017...

Page 44: ...2 5 SATA SSD 3MR2 P 44 Rev 1 0 TPS Apr 2017...

Page 45: ...2 5 SATA SSD 3MR2 P 45 Rev 1 0 TPS Apr 2017...

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