
Data Sheet
156
Rev. 1.00
2017-07-31
TLE9262-3BQX
Serial Peripheral Interface
capable or OFF then the mode will remain unchanged.The Receive Only Mode has to be selected by the user
before entering SBC Stop Mode. Please refer to
Chapter 5.4.4
for detailed information on the Selective Wake
mode changes.
6. Failure Handling Mechanism: When the device enters Fail-Safe Mode due to a failure (TSD2, WD-Failure,...),
then the wake registers
BUS_CTRL_1
and
WK_CTRL_2
are reset to following values (=wake sources) ‘xxx0
1001’ and ‘x0x0 0111’ in order to ensure that the device can be woken again.
Notes
1. The bit
I_PEAK_TH
can be modified in SBC Init and Normal Mode. In SBC Stop Mode this bit is Read only but
SPI_FAIL will not be set when trying to modify the bit in SBC STOP Mode and no INT is triggered in case
INT_
GLOBAL
is set.
2. see
Figure 31
for detailed state changes of CAN Transceiver for different SBC modes
3. Failure Handling Mechanism: When the device enters Fail-Safe Mode due to a failure (TSD2, WD-Failure,...),
then the wake registers
BUS_CTRL_1
, and
WK_CTRL_2
are reset to following values (=wake sources) ‘xxx0
1001’, and ‘x0x0 0111’ in order to ensure that the device can be woken again.
BUS_CTRL_2
Bus Control (Address 000 0101
B
)
POR / Soft Reset Value: 0000 0000
B
; Restart Value: 00x0 0000
B
7
6
5
4
3
2
1
0
Reserved
Reserved
I_PEAK_TH
Reserved
Reserved
Reserved
Reserved
Reserved
r
r
r
rw
r
r
r
r
r
Field
Bits
Type
Description
Reserved
7:6
r
Reserved, always reads as 0
I_PEAK_TH
5
rw
VCC1 Active Peak Threshold Selection
0B , low VCC1 active peak threshold selected (ICC1,peak_1)
1B , higher VCC1 active peak threshold selected (ICC1,peak_2)
Reserved
4:0
r
Reserved, always reads as 0
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