Infineon ISOFACE ISO2H823V2, Manual

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Application Note 15 2015-02-11
Revision 1.0
ISO2H823V2.5 Evaluation Board
Board Manual
Functional Description
2.3.1.3 Power Supply
The startup procedure of the power chip is explained in Figure 13.
Figure 13 Start Up Procedure of the Power Chip
During UVLO, all registers of the power chip are reset to their reset values as specified in the register description
(Chapter 6 inside the datasheet). As a result, the flags TE, UV as well as MV are High and the ERR pin is Low
(error condition). Immediately after the reset is released, the chip is first configured by “reading“ the logic level of
the SEL, MS1, MS0 - pins. The IC powers up as a parallel device i.e. the AD0-7 pins are high-impedance until the
IC configuration is over.
The supply voltage
V
BB
is monitored during operation by two internal comparators (with typ. 2 ms blanking time)
detecting:
•
V
BB
Undervoltage: If the voltage drops below the UV threshold, the UV-bit in the GLERR register is set High.
The IC operates normally.
• V
BB
Missing Voltage: If the voltage further drops below the MV threshold, lower than the previous threshold,
the MV-bit in the GLERR register is set, the Power Side of the IC is turned off when reaching the VReset-
threshold whereas the Micro-Controller Side remains active.
Note: The driver stage is self protected in overload condition: the internal switches will be turned off as long as the
overcurrent condition is detected and the IC will automatically restart once the overload condition
disappears.
Important: Since the UV and MV (as well as the TE) bits used for generating the ERR signal are preset to High
during UVLO, the ERR pin is Low after power up. Therefore the ERR requires to be explicitly cleared after power
up. At least one read access to the GLERR and INTERR registers or one default read access in certain access-
modes (see Chapter 4 of the datasheet) is needed to update those status bits and thus release the ERR pin.
V
VBB
V
VBBuvon
MV
por_uv_mv_events .vsd
V
MV
V
RESET
V
VBBoff
V
VBBon
V
UV
V
VBBmvoff
V
VBBmvon
V
VBBuvoff
Time
Voltage
V
VBBuvhys
V
VBBmvhys
V
VBBhys
RST
UV