ICL8001G / ICLS8082G
Design Guidelines
Control Principle
Application Note
8
Version 2.0, 2011-04-14
3
Control Principle
Figure 3
Block diagram of the ICL8001G
An inspection of the ICL8001G block diagram shows that the voltage measured at the shunt resistor Rs (see also
the application circuit in
Figure 1
), which varies according to the instant transformer primary current
Ip(t)
,
determines the gain voltage
VG
as
(1)
With the PWM OP gain
G
PWM
and the offset voltage ram
V
PWM
VG
is compared to the voltage
VR
, which is derived
from the input voltage divider (Ro, Ru). This means that the peak current through the power switch Q1 and the
primary inductance L varies according to the instant input voltage
Vin(t)
as expressed by
(2)
Depl. CoolMOS
Startup Cell
Power Managment
Zero Crossing
PWM Control
Gate Drive
Protection
HV
GND
GD
Gate
Control
Voltage
Reference
& Biasing
Over / Under-
Voltage Lockout
OTP
Restart /
Latchup
Control
VCC
CS
Leading
Edge
Blanking
VR
ZCV
Zero
Current
Detection
Over
Voltage
Protection
PM / PFC
Control
Foldback
Correction
Short
Winding
Detection
VG ( Vs )
PWM
Comparator
V
REF
V
FB
25k
2pF
PWM
s
PWM
V
R
t
Ip
G
t
Ip
VG
)
(
))
(
(
Rs
G
t
Vin
Ru
Ro
Ru
t
Ip
PWM
)
(
)
(
