ICL8001G / ICLS8082G
Design Guidelines
Design Parameters
Application Note
11
Version 2.0, 2011-04-14
cost and efficiency reduction with the option of choosing MOSFETs with higher breakdown voltages. For high
efficiency it is recommended to make the adjustment V
DSmax
= 2 Vinp + Vosc < 800 V or 900 V respectively. If
necessary, a transformer design with q < 1 (meaning reduced QR operation effect) should be favored over high
snubber losses.
4.3
Primary Peak Current Control
The peak current charging the primary inductance of the transformer reaches its maximum value at the input
voltage Vinp. By choosing the maximum threshold Vcsmax = 0.75 V for the shunt voltage generated at the instant
of Vinp, the shunt resistance is Rs = 2.7 Ω based on
(17)
The upper resistor, Ro, in the input voltage divider is dimensioned in consideration of losses and PFC. For
efficiency optimization, high ohmic values are preferred. A low ohmic input voltage divider enables a maximum
power factor adjustment.
The resistance of the lower input voltage divider resistor is expressed as
(18)
For the selection Vcsmax ≈ 0.75V and Rs = 2.7 Ω the Ru equation above helps to define (with the specification of
Ro = 560 kΩ) a resistance of Ru = 4.3 kΩ (choose Ru = 3.9 kΩ).
p
p
I
Vcs
Rs
max
max
Rs
I
G
Vinp
I
G
Rs
Ro
Ru
p
p
PWM
p
p
PWM
max
max
