Application Note
5 of 38
001-86233 Rev. *I
2021-11-04
PSoC™ 4 MCU low
-power modes and power reduction techniques
Power mode summary
Table 2
PSoC™
4 MCU power modes and resources availability
Subsystem
Active
Sleep
Deep sleep Hibernate Stop
CPU
ON
Retention
1
Retention
OFF
OFF
SRAM
ON
ON
Retention
Retention
OFF
High-speed peripherals (SPI, UART, etc.)
ON
ON
Retention
OFF
OFF
Universal digital blocks (UDBs)
ON
ON
Retention
2
OFF
3
OFF
VDAC
ON
ON
Retention
OFF
SPI slave and I
2
C slave (SCB-based)
ON
ON
ON
OFF
OFF
High-speed clock (IMO, ECO, and PLLs)
ON
ON
OFF
OFF
OFF
Low-speed clock (32 kHz) (ILO and WCO)
ON
ON
ON
OFF
OFF
Brown-out detection
ON
ON
ON
ON
OFF
Continuous time block (CTB) (opamp and
comparators)
ON
ON
ON
OFF
OFF
Continuous time block mini (CTBm)
(opamp and comparators)
ADC
ON
ON
OFF
OFF
OFF
Low-power comparators
ON
ON
ON
ON
OFF
GPIO (output state)
ON
ON
ON
ON
Frozen
4
1
Retention: The configuration and state of the peripheral are retained. The peripheral resumes its operation when the
device enters active mode.
2
The state of VDAC, as well as any UDB-based function, is preserved by calling a
_Sleep()
function before entering deep
sleep, and restored by calling a
_WakeUP()
function after exiting deep sleep mode.
3
When exiting hibernate mode, all UDB-based functions are reinitialized because the
PSoC™
4 MCU device goes through a
reset.
4
Frozen: The configuration, mode, and state of all GPIOs are locked. Changing the GPIO state is not possible until the
device enters active mode and the GPIOs are unlocked.
