Infineon Cypress F2MC-8FX Series, Operation Manual, Page: 24 / 40

MB2146-401 F
2
MC-8FX Family Evaluation Board Operation Guide, Doc. # 002-07324 Rev. *A 23
Specification
5.6 Through evaluation MCU all hole for a terminal check (U1)
The pin assignment of a through evaluation MCU all hole for a terminal check is shown in Table 5-7.
Table 5-7. Pin assignment of through evaluation MCU all hole for terminal check (continued)
Connector
Pin
Number
Evaluation
MCU
Pin No.
Signal
name
Connector
Pin
Number
Evaluation
MCU
Pin No.
Signal
name
Connector
Pin
Number
Evaluation
MCU
Pin No.
Signal
name
1 C3 Vcc51 41 M3 P80 81 U9 PADDR6
2 B2 LVCC 42 P1 P81 82 R9 PADDR7
3 D3 LVDOUT 43 N2 P82 83 T9 PRDATA0
4 C2 LVDENX2 44 R1 P83 84 V9 PRDATA1
5 B1 LVDIN 45 N4 P84 85 V10 PRDATA2
6 E3 LVR0 46 N3 PG0 86 R10 PRDATA3
7 E4 LVR1 47 P2 ROMS0 87 T10 PRDATA4
8 D2 LVR2 48 T1 ROMS1 88 U10 PRDATA5
9 E2 LVR3 49 R2 BRSTX 89 V11 PRDATA6
10 C1 LVR4 50 P4 BDBMX 90 V12 PRDATA7
11 F3 LVDBGR 51 P3 BSOUT 91 R11 PWDATA0
12 F4 LVDREXT 52 U1 BEXCK 92 T11 PWDATA1
13 F2 LVDENX 53 T2 BSIN 93 U11 PWDATA2
14 D1 BGOENX 54 R4 RSTX 94 V13 PWDATA3
15 E1 LVSS 55 R3 X0A 95 U12 PWDATA4
16 G3 NC1 56 V1 X1A 96 R12 PWDATA5
17 G4 P20A 57 A1 Vss_1 97 T12 PWDATA6
18 G2 P21A 58 U2 X1 98 V14 PWDATA7
19 F1 P22A 59 T4 X0 99 U13 NC3
20 G1 P23A 60 U3 MOD 100 V15 P10
21 H4 P24A 61 V2 Vcc53 101 R13 P11
22 H3 P25A 62 T5 PF0 102 T13 P12
23 H2 P26A 63 R5 PF1 103 U14 P13
24 H1 P27A 64 U4 PF2 104 V16 P14
25 J2 P23B 65 U5 NC2 105 U15 P15
26 J4 P24B 66 V3 PINT0 106 R14 P16
27 J3 P50 67 T6 PINT1 107 T14 DA1
28 J1 P51 68 R6 APBENX 108 V17 DA0
29 K1 P52 69 U6 PCLK 109 U16 AVR3
30 K4 P53 70 V4 PSEL_EXT 110 R15 AVcc3
31 K3 P54 71 V5 PENABLE 111 T15 AVR
32 K2 P55 72 T7 PLOCK 112 V18 AVcc
33 L1 P70 73 R7 PACTIVE 113 T16 AVss
34 M1 P71 74 U7 PWRITE 114 U17 P30
35 L4 P72 75 V6 PADDR0 115 R16 P31
36 L3 P73 76 V7 PADDR1 116 T17 P32
37 L2 P74 77 R8 PADDR2 117 U18 P33
38 N1 P75 78 T8 PADDR3 118 P16 P34
39 M2 P76 79 U8 PADDR4 119 P15 P35
40 M4 P77 80 V8 PADDR5 120 R17 P36