©Copyright 2000-2007 SD Card Association
SDIO Simplified Specification Version 2.00
32
Field
Type
Description
E4MI
R/W
Enable interrupt between blocks of data in 4-bit SD mode. Enable the multi-block IRQ
during 4-bit transfer for the SDIO card. When this bit is 0, the card shall not signal
interrupts during a 4-bit multi-block data transfer. If this bit is 1, the card shall generate
interrupts during 4 bit multi-block data transfers as described in 8.1.4 If this SDIO card
does not support 4 bit multi-block IRQs (S4MI=0), then this bit shall be R/O and
always read as 0. This bit shall be cleared to 0 by any reset
LSC
R/O
Card is a Low-Speed card. If this bit is set, it indicates that the SDIO card is a
Low-Speed card (see 2.1). If this bit is clear, the SDIO card is a Full-Speed card.
4BLS
R/O
4-bit support for Low-Speed cards. If the SDIO card is a Low-Speed card (LSC=1)
and it supports 4-bit data transfer, then this bit shall be set. If the card is not
Low-Speed or if the card does not support 4-bit transfer, then this bit shall be zero.
Pointer to
card’s
common CIS
R/O
This 3-byte pointer points to the start of the card’s common CIS. The common CIS
contains information relation to the entire card. The card common CIS shall be
located within the CIS space of function 0 (0x001000- 0x017FFF) as described in
section 6.11. A card common CIS is mandatory for all SDIO cards. This pointer is
stored in little-endian format (LSB first).
BS
R/O
Bus status: If this bit is set to 1, then the currently addressed function (selected by
FSx or by the function number in an I/O command) is currently executing a command
which transfers data on the DAT[x] line(s). If this bit is 0, then the addressed function
is not using the data bus. This bit is used by the host to determine which function of a
multi-function or combo card is currently performing data transfer. Note that this bit is
a part of the optional Suspend/Resume protocol. If the card does not support
Suspend/Resume, this bit shall be read as 0. Any access to the CIA may not be
suspended, so in this case, BS shall always be set to 1, irrespective of the host
setting BR to 1.
BR
R/W
Bus Release Request/Status: This bit is used to request that the addressed function
(selected by FSx or by the function number in CMD53 or Memory commands using
DAT line) release the Data lines and suspend operation. If the host sets this bit to 1,
the addressed function shall temporarily halt data transfer on the DAT[x] lines and
suspend the command that is in process. The BR bit shall remain set to 1 until the
release is complete. If the card can never accept the suspend request while
executing transactions, the card shall return response with BR cleared to 0 and BS
set to 1. This indicates that the suspend request is cancelled by the card and thus the
host should not issue a cancel suspend command.
The followings are the cases where the card can cancel a suspend request:
Transaction addressed to function 0.
The card knows the transfer will terminate soon.
The card knows the transfer is timing critical (i.e. If suspended, the transfer cannot
proceed).
A Multi function card that indicates SBS=1, but contains a function that does not
support suspend/resume.
Once the function is in suspend, it shall signal the host by clearing the BS and BR
bits. The host can monitor the status of the suspend request by reading the BR bit. If
it is set, the suspend request is still in progress. A pending suspend request can be
cancelled by the host by writing 0 to the BR bit.
The Standard Host Specification defines following suspend sequence:
If the suspend request is not accepted, the host retries with a cancel suspend request
command. Even if the card received a cancel suspend command, it should accept
suspend if possible. If the card does not accept suspend, the host considers the
function to have never suspend.
However, the host should monitor the BR, BS and EXx bits to confirm that the
suspend request was cancelled rather that granted. If SBS=0, this bit shall be R/O
and read as 0.
