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Industrial Electronic Engineers, Inc.

SIZE

A

CODE IDENT NO.

05464

S03858–21–0105

Van Nuys, California

Scale:  NONE

Rev    B

Sheet  9

2.2.7

Character Generator RAM (CG RAM)

The CG RAM allows the user to define 8 types of 5 X 7 character patterns.  Figure 4 shows the relationship
between CG RAM addresses and data patterns (Refer to Set CG RAM Address and Write to CG or DD RAM
instructions).

Character Codes

(DD RAM Data)

CG RAM

Address

Character Patterns

(CG RAM Data)

7

6

5

4

3

2

1

0

5

4

3

2

1

0

7

6

5

4

3

2

1

0

Higher Order Bits

Lower Order Bits

Higher Order Bits

Lower Order Bits

Higher Order Bits

Lower Order Bits

0

0

0

*

*

*

1

1

1

1

0

0

0

1

1

0

0

0

1

0

1

0

1

0

0

0

1

Character

0

1

1

1

1

1

1

0

Pattern

0

0

0

0

*

0

0

0

0

0

0

1

0

0

1

0

1

0

0

Example

1

0

1

1

0

0

1

0

1

1

0

1

0

0

0

1

1

1

1

*

*

*

0

0

0

0

0

Cursor

Figure 4

Relationship Between CG RAM Address, Character Codes (DD
RAM) and Character Patterns (CG RAM Data)

NOTES:

1)  The CG RAM consists of 64 bytes.  Any bytes not used for character pattern information can be

used for general purpose data RAM.  The 5, 6 and 7 bits are never used for character pattern
information and are always available for use.

2)  The 0, 1 and 2 bits of character code correspond to the 3, 4 and 5 bits of the CG RAM address.

3)  The 0, 1 and 2 bits of the CG RAM address specify the row of the character pattern.

4)  The 8th row of the character pattern corresponds to the cursor character pattern.  If any bit in the

row is "1", then the corresponding cursor bit is a "1" regardless of cursor position.  (For most
applications, the data should be "0" in this row, which allows for normal cursor operation on the
character.)

5)  Since bit 3 is a "don't care", two character codes represent the same special character.  For

example, a character code of 07 (hexadecimal) selects the same character pattern as OF
(hexadecimal).

2.2.8

Parallel/Serial Data Conversion Circuitry, Timing Generator Circuitry

These blocks control the interface to the LCD drivers.

Summary of Contents for 03858-21-0105

Page 1: ... 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 REVISION STATUS PROJ NO 411 CONTRACT INDUSTRIAL ELECTRONIC ENGINEERS INC VAN NUYS CALIFORNIA DRAWN R January 3 19 93 PARALLEL DATA INPUT CHECK 4 X 40 LCD MODULE WITH EL BACKLIGHT NOTICE IS HEREBY GIVEN THAT THIS DRAWING IS PART OF A PROPRIETARY ITEM OWNED BY INDUSTRIAL APPROVED SIZE CODE IDENT NO ELECTRONIC ENGINEERS INC AND SHALL NOT BE REPROD...

Page 2: ...rator Circuitry 9 3 0 OPERATION 10 3 1 Instruction Set 10 3 2 Power Up Instructions Sequence 11 3 3 Instructions Affecting the Relationship of Display Position Cursor and DD RAM Address 11 3 4 Instructions Affecting Custom Characters 11 4 0 ELECTRICAL SPECIFICATIONS 11 4 1 Absolute Maximum Rating 11 4 2 Normal Operating Rating 11 4 3 Electrical Characteristics VCC 5V 10 11 4 4 Timing Characteristi...

Page 3: ...ration 11 7 3 1 Normal Operation 11 7 3 2 Brightness Voltage and Frequency Characteristics 11 7 3 3 Intermittent Operation 11 7 3 4 Square Waveform Operation 11 7 3 5 Operating Temperature 11 7 3 6 Operating Life 11 7 4 Electromagnetic Interference EMI 11 7 5 DC AC Inverter 11 8 0 INSTALLATION NOTE 11 9 0 ACCESSORIES 11 10 0 OUTLINE and installation characteristics 11 ...

Page 4: ... Figure 8 Display Shift Right from Initial Conditions 11 Figure 9 Load Character with S 1 I D 0 from Initial Conditions 11 Figure 10 Load Character with S 1 I D 1 from Initial Conditions 11 Figure 11 Interface Timing Write 11 Figure 12 Interface Timing Read 11 Figure 13 Busy Flag Check Sequence for 8 bit Parallel Interface 11 Figure 14 Busy Flag Check Sequence for 4 bit Parallel Interface 11 Figur...

Page 5: ...ons where the display is remotely located up to 50 feet from the host processor the serial data input option should be used The serial model is described in IEE specification S3858 21 205 1 3 Description The Daystar Nova module is a self contained 1 16 multiplexed unit A simple parallel interface is provided and can be configured as either 4 or 8 bits The on board microprocessor controls the displ...

Page 6: ...SET and TEST pull down to ground to activate the function All three inputs may be left open if not used The VBIAS test point is used at the factory to preset the viewing angle The LCD Controllers are microprocessor units MPU designed specifically to control all multiplexing and character decoding functions for the LCD display E RS R W DB 7 DB 4 DB DB 3 0 LCD Controllers LCD Row Drivers and Shift R...

Page 7: ...Seg1 Seg40 Com1 Com16 D 5 5 40 Figure 2 LCD Controller Block Diagram 2 2 1 Instruction Register IR The IR stores instruction codes such as display clear and cursor shift and address information of the display data RAM DD RAM and character generator RAM CG RAM The IR can be written from the MPU but not read 2 2 2 Data Register DR The DR temporarily stores data to be written into or read from the DD...

Page 8: ...ROM CG ROM The CG ROM generates character patterns of 5 X 7 dots from 8 bit character codes The 192 5 X 7 dot matrix characters are illustrated in Figure 3 Figure 3 Correspondence Between Character Codes and Character Patterns Note Addresses 00h through 0Fh are reserved for CG RAM Addressing Addresses 10h through 1Fh and 80h through 9Fh are not used ...

Page 9: ...Character Patterns CG RAM Data NOTES 1 The CG RAM consists of 64 bytes Any bytes not used for character pattern information can be used for general purpose data RAM The 5 6 and 7 bits are never used for character pattern information and are always available for use 2 The 0 1 and 2 bits of character code correspond to the 3 4 and 5 bits of the CG RAM address 3 The 0 1 and 2 bits of the CG RAM addre...

Page 10: ...R L Moves cursor or shifts entire display one position DD RAM contents are unchanged 40µs Function Set 0 0 0 0 1 DL 1 0 Sets Interface Data Length 40µs Set CG RAM Address 0 0 0 1 Sets CG RAM address CG RAM data is sent or received after this is set 40µs Set DD RAM Address 0 0 1 Sets DD RAM address DD RAM data is sent or received after this is set 40µs Read Busy Flag and Address 0 1 BF Reads Busy F...

Page 11: ... 3 Instructions Affecting the Relationship of Display Position Cursor and DD RAM Address The DD RAM contains the 8 bit character codes of the 40 characters displayed on the Daystar Nova LCD The Cursor or Display Shift instruction and the Write to DD RAM and Entry Mode instructions affect the relationship between DD RAM address and display position Figures 6 to 10 illustrate the effects of these in...

Page 12: ... 26 MPU1 67 40 41 42 43 44 45 46 47 48 49 61 62 63 64 65 66 00 01 02 03 04 05 06 07 08 09 0A 22 23 24 25 26 27 MPU2 40 41 42 43 44 45 46 47 48 49 4A 62 63 64 65 66 67 Cursor Last Character Entered Figure 10 Load Character with S 1 I D 1 from Initial Conditions 3 4 Instructions Affecting Custom Characters The module allows the user to define 8 unique special characters The pattern of the characters...

Page 13: ...N 0 to VCC 0 001 mA Supply Current logic ICC 10 20 mA Backlight Current IBL VBL 5 VDC 120 mA 4 4 Timing Characteristics Write Operation Refer to Figure 11 Item Symbol Min Max Unit Enable Cycle Time tCYC 1000 ns Enable Pulse Width High Level PWEH 450 ns Enable Rise Fall Time tEr tEf 25 ns Address Set up Time RS R W tAS 140 ns Address Hold Time tAH 10 ns Data Set up Time tDSW 195 ns Data Hold Time t...

Page 14: ... Write Figure 12 Interface Timing Read Valid Data t t AS PWEH tAH tAH DSW t tH t VIL1 VIL1 VIL1 VIL1 VIL1 VIL1 VIL1 V IH1 V IH1 VIH1 VIH1 V IH1 VIL1 RS R W E DB 0 7 DB cyc t t t t t t tEf t t t t t t Er Valid Data t t AS PWEH tAH tAH t VIL1 VIL1 VIL1 VIL1 VIL1 VIH1 VIH1 V IH1 V IH1 RS R W E DB 0 7 DB cyc VIH1 V IH1 Er tEf t DHR IH1 t DDR V V OL1 OH1 ...

Page 15: ... for 4 Bit Parallel Interface Figure 14 illustrates the typical Busy Flag check sequence for a 4 bit data bus interface Figure 14 Busy Flag Check Sequence for 4 bit Parallel Interface Note IR7 IR3 Instruction 7th bit 3rd bit AC3 Address Counter 3rd bit DB IR7 IR 7 IR 3 AC 3 D 3 AC 3 Busy Not Busy 7 Internal Operation E RS Instruction Write Busy Flag Check Busy Flag Check Instruction Write Data Bus...

Page 16: ... Ground 11 DB0 12 Ground 13 DB1 14 Ground 15 DB2 16 Ground 17 DB3 18 Ground 19 DB4 20 Ground 21 DB5 22 VCC 5VDC Parallel with Pin 24 23 DB6 24 VCC 5VDC Parallel with Pin 22 25 DB7 26 N C When the display module includes the serial data input option Pin 3 is internally connected to provide signal E2 as an output to a second display module CMOS Note Care must be taken to insure that input signals do...

Page 17: ...ONS 6 1 Optical Characteristics Format Four lines of 40 characters Character Font 5x7 dot matrix with cursor Character Height w cursor 0 48 12 1mm Character Height w o cursor 0 39 9 9mm Character Width 0 24 6 1mm Overall Active Area 5 70 x 2 34 144 9mm x 59 5mm Peak Vertical Viewing Angle 20 below normal plane Viewing Mode Transflective light field Item Symbol Condition Min Typ Max Unit Viewing An...

Page 18: ...Figure 15 Definition of Vertical Viewing Angle Definition of Horizontal Viewing Angle top Viewing Display for Bottom Viewing Displays φ 20 Typically X X Y Y Normal φ 20º θ θ θ 90º θ 90º Figure 16 Definition of Horizontal Viewing Angle Display contrast ratio is given by CR B B 2 1 Where B1 Brightness of selected segment B2 Brightness of non selected segment ...

Page 19: ...ard potentiometer This is considered to be a nominal adjustment but the user may prefer to vary this to optimize the viewing for a particular application The bias voltage is measured between VCC pin 22 and VBIAS pin 2 The viewing angle and contrast ratio may be externally controlled using an additional 10K ohm potentiometer The potentiometer on the rear of the module must first be set to the maxim...

Page 20: ... typical operation at 90 Volts AC at 330 cycles The light output of the lamp under these operating conditions is typically 12 ft L Since the LCD transmits approximately 8 of the light the light output through the display is 1 ft L 7 3 2 Brightness Voltage and Frequency Characteristics Other voltages and frequencies can be applied to the lamp to increase or decrease the light output Figure 19 illus...

Page 21: ...ncy components in the square wave as distance from the bus bar increases Consequently the waveform is rounded at distances away from the bus bar Second the leading edge of a square wave contains high order harmonics which may cause radio interference EMI 7 3 5 Operating Temperature The maximum continuous operating temperature for the EL backlight is specified at 40 C Service may be extended to 70 ...

Page 22: ...s Figure 21 Brightness vs Time 7 4 Electromagnetic Interference EMI Electroluminescent lamps have been shown to radiate negligible interference through UHF when operated by quasi sinusoidal waveforms 7 5 DC AC Inverter Optimum performance and life can be achieved by using the inverter P N 46013 01 The inverter extends the useful life of the lamp by compensating for the aging characteristics of the...

Page 23: ... 050 minimum be provided between the window material and the surface of the LCD to prevent the transfer of static charges to the front surface of the LCD Supertwist LCD s may activate un driven elements in response to a surface static charge on the front polarizer It may take several minutes for such a surface static charge to dissipate 9 0 ACCESSORIES Power Data Connector Only 26 pin 30554 99 Key...

Page 24: ...strial Electronic Engineers Inc SIZE A CODE IDENT NO 05464 S03858 21 0105 Van Nuys California Scale NONE Rev B Sheet 24 10 0 OUTLINE AND INSTALLATION CHARACTERISTICS Figure 22 03858 21 0105 Outline Drawing ...

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