9
Tsi384 Evaluation Board User Manual
60E1000_MA001_08
Integrated Device Technology
www.idt.com
1. Board
Design
Topics discussed include the following:
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“Overview” on page 9
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“PCI/X Interface” on page 10
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“PCIe Interface” on page 12
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“Power Management” on page 13
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“Clock Management” on page 16
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“Other Interfaces” on page 18
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“Hardware Reset” on page 18
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“Logic Analyzer Connectivity” on page 18
1.1
Overview
The key features of the Tsi384 evaluation board include the following:
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Single x4 lane, 2.5 Gbps PCIe 1.1 compatible riser card (extended height form factor)
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Three PCI/X slots
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32-/64-bit PCI/X bus, 25–133 MHz operation
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PCI/X power support through system or external supply
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PCIe compliance/debugging test points
