3. Clocking and Reset Options
50
Tsi310 User Manual
80B6020_MA001_05
There may be some applications for which these assumptions are inaccurate. For example, a
conventional PCI device may be connected in a point-to-point manner. For exceptions like this,
two control input signals are provided, P_DRVR_MODE for the primary interface and
S_DRVR_MODE for the secondary interface. When these inputs are pulled high, the Tsi310
changes the output impedance of the drivers on their respective interfaces to the opposite state
than was assumed by default (see
).
3.6
Reset Functions and Operations
Each bus interface has an asynchronous bus reset signal that is used at power-on and other times
to place the Tsi310 into a known state. On the primary interface, the reset signal is an input to
the Tsi310. On the secondary interface, the reset signal is an output driven by the bridge in its
role as the central resource for that bus.
3.6.1
Primary Reset
The bus reset for the primary interface is called P_RST#. It is an input to the Tsi310 and is
controlled by an external upstream central resource. When asserted (see
) it forces all bus output signals from the bridge into their benign states
and sets all configuration registers within the Tsi310 to their reset values as defined in
. Activating the P_RST# signal also causes the secondary bus reset signal
to be asserted, as required by the PCI and PCI-X specifications.
Table 6: Driver Impedance Selection
a
a. Note that the values on these inputs are only valid at reset time; they may not be used to change the driver mode
dynamically, though they may be set differently at each reset if desired to account for changes in bus loading and
mode. Regardless of the driver impedance used, signal analysis should always be done with the actual or expected
bus topology and wiring to verify proper operation. Nets may need to be tuned and series terminations or other
adjustments may be required in order to meet the frequency targets.
Primary Bus
Mode
Default Driver
Mode
(P_DRVR_MODE
=0)
Driver Mode if
P_DRVR_MODE=
1
Secondary
Bus Mode
Default Driver
Mode
(S_DRVR_MODE
=0)
Driver Mode if
S_DRVR_MODE=
1
Conventional
PCI
Multi-point (20
)
Point-to-point
(40
)
Conventional
PCI
Multi-point (20
)
Point-to-point
(40
)
PCI-X 66
Multi-point (20
)
Point-to-point
(40
)
PCI-X 66
Multi-point (20
)
Point-to-point
(40
)
PCI-X 100
Multi-point (20
)
Point-to-point
(40
)
PCI-X 100
Multi-point (20
)
Point-to-point
(40
)
PCI-X 133
Point-to-point
(40
)
Multi-point (20
)
PCI-X 133
Point-to-point
(40
)
Multi-point (20
)
Summary of Contents for Tsi310TM
Page 8: ...Contents 8 Tsi310 User Manual 80B6020_MA001_05...
Page 10: ...List of Figures 10 Tsi310 User Manual 80B6020_MA001_05...
Page 12: ...List of Tables 12 Tsi310 User Manual 80B6020_MA001_05...
Page 18: ...18 Tsi310 User Manual 80B6020_MA001_05...
Page 44: ...2 Bus Operation 44 Tsi310 User Manual 80B6020_MA001_05...
Page 58: ...3 Clocking and Reset Options 58 Tsi310 User Manual 80B6020_MA001_05...
Page 62: ...4 Transaction Ordering 62 Tsi310 User Manual 80B6020_MA001_05...
Page 150: ...5 Configuration Registers 150 Tsi310 User Manual 80B6020_MA001_05...
Page 170: ...6 Signals and Pinout 170 Tsi310 User Manual 80B6020_MA001_05...
Page 190: ...7 JTAG Boundary Scan 190 Tsi310 User Manual 80B6020_MA001_05...
Page 196: ...8 Electrical Characteristics 196 Tsi310 User Manual 80B6020_MA001_05...
Page 200: ...9 Package Information 200 Tsi310 User Manual 80B6020_MA001_05...
Page 202: ...A Ordering Information 202 Tsi310 User Manual 80B6020_MA001_05...
Page 206: ...Index 206 Tsi310 User Manual 80B6020_MA001_05...