1. Board Design
16
Tsi381 Evaluation Board User Manual
60E2000_MA001_03
Integrated Device Technology
www.idt.com
1.6.3
GPIO Interface
The GPIO Interface is comprised of the following:
•
On-board LEDs on GPIO lines
•
Available 100mil Header to send/receive external 3.3V level signals
The following list outlines the connections to GPIO:
•
External I/O header:
— J7.1: NC
— J7.2: GPIO0
— J7.3: GPIO1
— J7.4: GPIO2
— J7.5: GPIO3
— J7.6: Connected to ground
•
LEDs:
— D11: GPIO0, active led when driven low
— D1: GPIO1, active led when driven low
— D13: GPIO2, active led when driven low
— D12: GPIO3, active led when driven low
1.7
Hardware Reset
The following figure shows the reset options of the Tsi381 evaluation board.
Figure 4: Board Reset
PCIe Edge Connector X1
Reset
Controller
SYS_PCIe_PERSTn
PUSHBUTTON
PCIe_PERSTn
