REVISION B 04/01/15
3
EVK-UFT285-6-7 EVALUATION BOARD USER GUIDE
Legend–Evaluation Board Top View
Inputs
CLK0_S
Clock 0 sense lines.
CLK0
Clock 0 input lines. Can be configured for differential or single-ended input.
CLK1_S
Clock 1 sense lines.
CLK1
Clock 1 input lines. Can be configured for differential or single-ended input.
CLK2
Clock 2 input lines. Can be configured for differential or single-ended input.
CLK3
Clock 3 input lines. Can be configured for differential or single-ended input.
Outputs
Q0
Output Q0. Can be a differential pair or two individual single-ended outputs.
Q1
Output Q1. Can be a differential pair or two individual single-ended outputs
Q2
Output Q2. Can be a differential pair or two individual single-ended outputs.
Q3
Output Q3. Can be a differential pair or two individual single-ended outputs.
Q4
Output Q4. Can be a differential pair or two individual single-ended outputs.
Q5
Output Q5. Can be a differential pair or two individual single-ended outputs.
Q6
Output Q6. Can be a differential pair or two individual single-ended outputs.
Q7
Output Q7. Can be a differential pair or two individual single-ended outputs.
Other
A
Dip Switch for DC control signals (CLK_SEL, PLL_BYPASS, etc)
B
VCCO_J
C
VCC_J
D
GPIOs
E
RESET
F
IDT8T49N286 – the device to be evaluated
G
USB connector
H
EEPROM – AT24CO4C
J
Ground Jack
