REVISION B 04/01/15
11
EVK-UFT285-6-7 EVALUATION BOARD USER GUIDE
Board Power Supply
Core Voltages
The core voltage includes a digital voltage VDD and an analog voltage VDDA. Both core voltages are powered by the external
bench power supply connected to J6 (VCC_J). See
Figure 9
for details
Output Voltages
VDDO_J (J1) supplies the global voltage for the outputs and can be biased by the external power supply at 1.8V (all outputs
LVCMOS), 2.5V, or 3.3V.
Mixed Voltage Operation
This board provides the option to operate the outputs with a mixed combination of output voltages. Refer to
Figure 8
for a
complete view of the VCCO schematic. Each VCCOx has a 0
resistor that connects it to the global VCCO_J power rail. This
resistor can be removed and the voltage can be provided using the test point. For example, the schematic below can be
configured so that Q0 (VCCO0) operates at 2.5V and Q4 LVCMOS (VCCO4) operates at 1.8V as follows:
1) Connect 2.5V to J1 (VCCO_J).
2) Remove R146. This isolates VCCO4 from global VCCO_J.
3) Solder a wire onto test point VCCO4 and bias with a 1.8V supply.
Figure 10. Mixed Output Voltage Operation
