IDT CPS-1848, User Manual

Page: 40 / 450

2. RapidIO Ports > Reset Control Symbol Processing
CPS-1848 User Manual 40 June 2, 2014
Formal Status This document is confidential and is subject to an NDA.
Integrated Device Technology
2.6.1 Disabling IDLE2 Operation
When operating at lane speeds of 5 Gbaud or less, IDLE2 operation should be disabled in order to improve link performance,
as displayed in
Table 7 .
2.7 Reset Control Symbol Processing
A RapidIO device can be reset using a RapidIO reset request. This type of reset request consists of four reset request control
symbols received with no intervening control symbols, except status control symbols.
The CPS-1848 can handle a RapidIO reset request in one of two ways, based on the value of the PORT_RST_CTL field of the
Device Control 1 Register . A value of 0 resets the entire CPS-1848, while a value of 1 resets just the port that received the
reset request. For more information about a “per-port” reset, see the following section.
2.7.1 Per-Port Reset
A per-port reset causes a RapidIO port to behave as follows:
1. All outstanding error states and retry states are cleared. This includes input-error and output-error.
2. All unacknowledged, transmitted packets are discarded, and tracking of transmitted packets is cleared.
3. Any current packet being received is discarded by the switch. The packet is not acknowledged.
4. Tracking of outstanding Link-Request/Input-Status (error recovery) control symbols is reset.
Lane {0..47} Control Register .LANE_DIS
Lane disable/enable
Port reset (see PORT_SEL in Device Reset and Control
Register )
Port {0..17} Operations Register .TX_FLOW_CTL_DIS
TX Flow control disable/enable
Force-reinit required (see FORCE_REINIT in Port {0..17}
Operations Register )
These recommended port operations also apply when any of these port configuration events are
performed within an EEPROM load. After each event, the recommended operation should be
implemented within the EEPROM load (for more information, see the note in
EEPROM Format ).
Table 7: Disabling IDLE2 Operation on Port 3
Step Register Offset Value
1. Disable IDLE2 by setting IDLE2_EN to 0. Port {0..17} Error
and Status CSR
0x0001B8 0x80000000
2. Perform a port reset by writing to PORT_SEL.
1
1. After performing a port reset, clear Port {0..17} Error and Status CSR .PORT_ERR if it was set during the reset process
(for more information, see HS-LP Controlled Recovery ). For Revision A/B devices, a Link-Request control symbol must
be sent to clear the fatal error condition before clearing PORT_ERR.
Device Reset and
Control Register
0xF20300 0x80000008
3. Once the port achieves PORT_OK (PORT_OK is 1),
then disable IDLE2 on the connected port using
maintenance packet, I2C, or JTAG. Port {0..17} Error
and Status CSR
0x0001B8 -
Table 6: Port Reconfiguration Operations (Continued)
Port Configuration Event Recommended Port Operation