IDT SMBus Interfaces
PES24N3A User Manual
6 - 4
April 10, 2008
Notes
Figure 6.3 Sequential Double Word Initialization Sequence Format
The final type of configuration block is the configuration done sequence which is used to signify the end
of a serial EEPROM initialization sequence. If during serial EEPROM initialization an attempt is made to
initialize a register that is not defined in a configuration space (i.e., not defined in Chapter 9, Configuration
Registers), then the Unmapped Register Initialization Attempt (URIA) bit is set in the SMBUSSTS register
and the write is ignored.
The configuration done sequence consists of two fields and its format is shown in Figure 6.4. The
CHECKSUM field contains the checksum of all of the bytes in all of the fields read from the serial EEPROM
from the first configuration block to the end of this done sequence. The second field is the TYPE field which
is always 0x3 for configuration done sequences.
Figure 6.4 Configuration Done Sequence Format
The checksum in the configuration done sequence enables the integrity of the serial EEPROM initializa-
tion to be verified. Since uninitialized EEPROMs typically have a value of all ones, initialization from an
uninitialized serial EEPROM will result in a checksum mismatch. The checksum is computed in the
following manner:
An 8-bit counter is initialized to zero and the 8-bit sum is computed over the configuration bytes
stored in the serial EEPROM, including the entire contents of the configuration done sequence,
with the checksum field initialized to zero
1
. The 1’s complement of this sum is placed in the check-
sum field.
The checksum is verified in the following manner:
1.
This includes the byte containing the TYPE field.
Bit
0
Bit
1
Bit
2
Bit
3
Bit
4
Bit
5
Bit
6
Bit
7
Byte 0
CSR_SYSADDR[7:0]
CSR_SYSADDR[13:8]
TYPE
0x1
Byte 1
Byte 2
NUMDW[7:0]
Byte 3
NUMDW[15:8]
Byte 4
DATA0[7:0]
Byte 5
DATA0[15:8]
Byte 6
DATA0[23:16]
Byte 7
DATA0[31:24]
Byte 4n+4
DATAn[7:0]
Byte 4n+ 5
DATAn[15:8]
Byte 4n+6
DATAn[23:16]
Byte 4n+7
DATAn[31:24]
...
...
Bit
0
Bit
1
Bit
2
Bit
3
Bit
4
Bit
5
Bit
6
Bit
7
Byte 0
CHECKSUM[7:0]
Reserved
TYPE
0x3
Byte 1
(must be zero)
Summary of Contents for 89HPES24N3A
Page 10: ...IDT Table of Contents PES24N3A User Manual iv April 10 2008 Notes...
Page 12: ...IDT List of Tables PES24N3A User Manual vi April 10 2008 Notes...
Page 14: ...IDT List of Figures PES24N3A User Manual viii April 10 2008 Notes...
Page 18: ...IDT Register List PES24N3A User Manual xii April 10 2008 Notes...
Page 64: ...IDT Link Operation PES24N3A User Manual 4 8 April 10 2008 Notes...
Page 88: ...IDT Power Management PES24N3A User Manual 7 4 April 10 2008 Notes...
Page 160: ...IDT Configuration Registers PES24N3A User Manual 9 66 April 10 2008 Notes...